From f82da653fd07ac06f9d17f1f23e89a459fd96511 Mon Sep 17 00:00:00 2001 From: Sven Eckelmann Date: Sun, 9 Nov 2025 09:38:48 +0100 Subject: [PATCH] realtek: DSA: Document meaning of lag priv variables The names of the LAG variables in struct rtl838x_switch_priv are not self explaining. They are even suggesting that they are dealing with information which are actually stored in a different variable. As first step, document their meaning. Signed-off-by: Sven Eckelmann Link: https://github.com/openwrt/openwrt/pull/20707 Signed-off-by: Hauke Mehrtens --- .../files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h index ca9558f8df..32e124091e 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h @@ -1164,9 +1164,22 @@ struct rtl838x_switch_priv { u32 fib_entries; int l2_bucket_size; struct dentry *dbgfs_dir; + + /** @lags_port_members: Port (bit) is part of a specific LAG */ u64 lags_port_members[MAX_LAGS]; + + /** @lag_primary: port of a LAG is primary (repesenting) and is added to + * the port matrix + */ u32 lag_primary[MAX_LAGS]; + + /** + * @is_lagmember: Port is part of any LAG but not the first/primary + * port which needs to be added in the port matrix + */ u32 is_lagmember[57]; + + /** @lagmembers: Port (bit) is part of any LAG */ u64 lagmembers; struct workqueue_struct *wq; struct notifier_block ne_nb; -- 2.30.2