From d5fec0b125a31c148cf398b5106d49f361bd377b Mon Sep 17 00:00:00 2001 From: Sven Eckelmann Date: Sun, 23 Nov 2025 15:25:05 +0100 Subject: [PATCH] realtek: pcs: Fix overflow in rtpcs_930x_sds_clock_wait It can happen that the calculation `start + (HZ / 1000) * timeout` overflows `unsigned long`. This must be handled correctly to avoid too long waits. Luckily, the `time_before()` helper already does this. Signed-off-by: Sven Eckelmann Link: https://github.com/openwrt/openwrt/pull/20906 Signed-off-by: Hauke Mehrtens --- target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c index cced6d5168..482bc2e08e 100644 --- a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c +++ b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c @@ -685,13 +685,14 @@ static int rtpcs_930x_sds_clock_wait(struct rtpcs_ctrl *ctrl, int timeout) { u32 v; unsigned long start = jiffies; + unsigned long end = start + (HZ / 1000) * timeout; do { rtpcs_sds_write_bits(ctrl, 2, 0x1f, 0x2, 15, 0, 53); v = rtpcs_sds_read_bits(ctrl, 2, 0x1f, 20, 5, 4); if (v == 3) return 0; - } while (jiffies < start + (HZ / 1000) * timeout); + } while (time_before(jiffies, end)); return 1; } -- 2.30.2