From a3d681d7f5dcb6cf9142a50e6ea55f79f25d276e Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Sun, 24 Aug 2025 14:10:30 -0400 Subject: [PATCH] realtek: XGS1210-12: convert RTL8226 PHYs to 2500base-x We reached the point of no return. Upstream has gained the final bits for the RTL8226 PHYs. That means. - RTL8226 MAC side behaves like RTL8221(B) - It's serdes no longer uses proprietary HSGMII (2.5G SGMII) - Instead it dynamically switches between SGMII and 2500base-x This (partly) solves one of the central henn/egg problems of the Realtek target. To change the MAC/PHY interface mode both sides need to have all bits in place to do so. But where to start if so much needs to be done? Now the PHY side has created facts and it mitigates a lot of problems. All downstream HSGMII patches and coding can be dropped in the future. For now only adapt the only DTS that still maps PHYs to HSGMII. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/19843 Signed-off-by: Hauke Mehrtens --- target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12.dts index e1f4753f23..9ff919573a 100644 --- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12.dts +++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1210-12.dts @@ -290,14 +290,14 @@ port@24 { reg = <24>; label = "lan9"; - phy-mode = "hsgmii"; + phy-mode = "2500base-x"; phy-handle = <&phy24>; led-set = <1>; }; port@25 { reg = <25>; label = "lan10"; - phy-mode = "hsgmii"; + phy-mode = "2500base-x"; phy-handle = <&phy25>; led-set = <1>; }; -- 2.30.2