drm/amd/pp: missing curly braces in smu7_enable_sclk_mclk_dpm()

We added some more lines of code to this if statement but forgot to add
curly braces.

Fixes: 0c24e7ef233b ("drm/amd/powerplay: add specific changes for VEGAM in smu7_hwmgr.c")
Signed-off-by: Dan Carpenter <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/display: fix vega12/20 handling in dal_asic_id.h

- Remove unused ASICREV_IS_VEGA12_p() macro
- Fix ASICREV_IS_VEGA12_P() macro to properly check against vega20

Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/display: remove VEGA20 config option

Leftover from bringup.  No need to keep it around for
upstream.

Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/display: remove VEGAM config option

Leftover from bringup.  No need to keep it around for
upstream.

Reviewed-by: Harry Wentland <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/scheduler: Remove obsolete spinlock.

This spinlock is superfluous, any call to drm_sched_entity_push_job
should already be under a lock together with matching drm_sched_job_init
to match the order of insertion into queue with job's fence seqence
number.

v2:
Improve patch description.
Add functions documentation describing the locking considerations

Signed-off-by: Andrey Grodzovsky <[email protected]>
Acked-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: remove unused member

This lock isn't used any more.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Chunming Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/pp: Workaround flickering issue on RV

Screen flickering observed while running 1080p video using
MPV_VAAPI/VDPAU with 4x4K@60 monitors

Need to set higher mclk in this configuration.

Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Skip drm_sched_entity related ops for KIQ ring.

Following change 75fbed2 we never initialize or use the GPU
scheduler for KIQ and hence we need to skip KIQ ring when iterating
amdgpu_ctx's scheduler entites.

Signed-off-by: Andrey Grodzovsky <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: flag Vega20 as experimental

Must set amdgpu.exp_hw_support=1 on the kernel command line in
grub to enable support.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Add vega20 pci ids

Acked-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Switch to use df_v3_6_funcs for vega20 (v2)

v2: fix whitespace (Alex)

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/df: implement df v3_6 callback functions (v2)

New df helpers for 3.6.

v2: switch to using df 3.6 headers (Alex)

Acked-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add df 3.6 headers

Needed for vega20.

Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/vg20:Enable UVD/VCE for Vega20

Vega20 ucode load type is set to AMDGPU_FW_LOAD_DIRECT for default.
So UVD/VCE needn't PSP IP block up. UVD/VCE for Vega20 can be enabled
at this moment.

Signed-off-by: James Zhu <[email protected]>
Reviewed-by: Leo Liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/vg20:Enable 2nd instance queue maping for uvd 7.2

Enable 2nd instance uvd queue maping for uvd 7.2. For user, only one UVD
instance presents. there is two rings for uvd decode, and
4 rings for uvd encode.

Signed-off-by: James Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/vg20:Enable the 2nd instance IRQ for uvd 7.2

For Vega20, the 2nd instance uvd IRQ using different client id.
Enable the 2nd instance IRQ for uvd 7.2

Signed-off-by: James Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/vg20:Add IH client ID for the 2nd UVD

For Vega20, there are two UVD hardware. Need add
the 2nd IH client ID for the 2nd UVD Hardware.

Signed-off-by: James Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/vg20:Enable the 2nd instance for uvd

For Vega20, set num of uvd instance to 2, to enble 2nd instance.
The IB test build-in registers need update for vega20 2nd instance.

Signed-off-by: James Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/vg20:increase 3 rings for AMDGPU_MAX_RINGS

For Vega20, there are two UVD Hardware. One more UVD hardware
adds one decode ring and two encode rings. So AMDGPU_MAX_RINGS
need increase by 3.

Signed-off-by: James Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/vg20:Restruct uvd.inst to support multiple instances

Vega20 has dual-UVD. Need add multiple instances support for uvd.
Restruct uvd.inst, using uvd.inst[0] to replace uvd.inst->.
Repurpose amdgpu_ring::me for instance index, and initialize to 0.
There are no any logical changes here.

Signed-off-by: James Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/vg20:Restruct uvd to support multiple uvds

Vega20 has dual-UVD. Need Restruct amdgpu_device::uvd to support
multiple uvds. There are no any logical changes here.

Signed-off-by: James Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Disable ip modules that are not ready yet

Please enable above ips on soc15.c when they're available.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/powerplay: update vega20 cg flags (v2)

v2: remove duplicate flag.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Set vega20 load_type to AMDGPU_FW_LOAD_DIRECT.

Please revert this patch when psp load fw is enabled.

Acked-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Use vbios table for gpu info on vega20

Use the vbios table rather than gpu info firmware.

Squash of the following patches:
drm/amdgpu/vg20: fallback to vbios table if gpu info fw is not available (v2)
drm/amdgpu: drop gpu_info firmware for vega20

Reviewed-by: Amber Lin <[email protected]>
Reviewed-by: Hawking Zhang <Hawking.Zhang>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/atomfirmware: add parser for gfx_info table

Add support for the gfx_info table on boards that use atomfirmware.

Acked-by: Christian König <[email protected]>
Reviewed-by: Hawking Zhang <Hawking.Zhang>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/atomfirmware: add new gfx_info data table v2.4 (v2)

Adds additional gfx configuration data.

v2: fix typo

Acked-by: Christian König <[email protected]>
Reviewed-by: Hawking Zhang <Hawking.Zhang>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: Add harvest IP support for Vega20

Retrieve fuses to determine the availability of pipes, and
eliminate pipes that cannot be used.

Acked-by: Christian König <[email protected]>
Signed-off-by: Jerry (Fangzhi) Zuo <[email protected]>
Reviewed-by: Hersen Wu <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>

drm/amd/display: Add BIOS smu_info v3_3 support for Vega20

Acked-by: Christian König <[email protected]>
Signed-off-by: Jerry (Fangzhi) Zuo <[email protected]>
Reviewed-by: Hersen Wu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>

drm/amd/display: Remove COMBO_DISPLAY_PLL0 from Vega20

Signed-off-by: Jerry (Fangzhi) Zuo <[email protected]>
Reviewed-by: Hersen Wu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>

drm/amd/display: Add Vega20 config. support

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Jerry (Fangzhi) Zuo <[email protected]>
Reviewed-by: Harry Wentland <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd: Add dce-12.1 gpio aux registers (v2)

Updating dce12 register headers by adding dc registers
required for potential DP LTTPR support.

v2: fix mode change

Acked-by: Christian König <[email protected]>
Signed-off-by: Roman Li <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Add vega20 to dc support check (v2)

v2: fix whitespace

Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display/dm: Add vega20 support

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Add nbio support for vega20 (v2)

Some register offset in nbio v7.4 are different with v7.0.

v2: Use nbio7.0 for now.

TODO: add a new nbio 7.4 module (Alex)

Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/soc15: Add ip blocks for vega20 (v2)

Same as vega10 now.

v2: squash in typo fix

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/soc15: dynamic initialize ip offset for vega20

Vega20 need a seperate vega20_reg_init.c due to ip base
offset difference.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/soc15: Set common clockgating for vega20.

Same as vega10 for now.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/soc15:Add vega20 soc15_common_early_init support

Set external_rev_id and disable cg,pg for now.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/gfx9: Add clockgatting support for vega20

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/gfx9: Add support for vega20

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/gfx9: Add gfx config for vega20. (v4)

v2: clean up (Alex)
v3: additional cleanups (Alex)
v4: drop leftover TODO (Alex)

Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/gfx9: Add vega20 golden settings (v3)

v2: squash in updates (Alex)
v3: squash in more updates (Alex)

Acked-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/gfx9: Add support for vega20 firmware

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/sdma4: Add clockgating support for vega20

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/sdma4: Add vega20 golden settings (v3)

v2: squash in updates (Alex)
v3: squash in more updates (Alex)

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/sdma4: Specify vega20 firmware

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/mmhub: Add clockgating support for vega20

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/gmc9: Add vega20 support

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/virtual_dce: Add vega20 support

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Specify vega20 vce firmware

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Specify vega20 uvd firmware

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Add vega20 ucode loading method

The same as vega10.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/psp: Add initial psp support for vega20

The same as vega10 for now.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/powerplay: Add initial vega20 support v2

Initial powerplay support the same as vega10 for now.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Add smu firmware support for vega20

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: set asic family for vega20.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Add gpu_info firmware for vega20. (v2)

vega20_gpu_info firmware stores gpu configuration for vega20.

v2: drop gpu info firmware for vega20

Squash of:
drm/amdgpu: Add gpu_info firmware for vega20.
drm/amdgpu: drop gpu_info firmware for vega20

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Add vega20 to asic_type enum.

Add vega20 to amd_asic_type enum and amdgpu_asic_name[].

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/include/vg20: adjust VCE_BASE to reuse vce 4.0 header files

Vega20 uses vce 4.1 engine, all the registers have the
same absolute offset with vce 4.0. By adjusting vega20
VCE_BASE, vce 4.1 can reuse vce 4.0 header files.

Signed-off-by: James Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd: Add vega20_ip_offset.h headerfile for vega20. (v2)

This headerfile contains vega20's ip base addresses.

v2: squash in MP1_BASE fix

Acked-by: Christian König <[email protected]>
Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Fix hardcoded base offset of vram pages

In gmc_v9_0_vram_gtt_location(),the vram_base_offset is hardcoded
to 0 in dGPU. Fix it by reading mmMC_VM_FB_OFFSET or return
zfb_phys_addr if ZFB is enabled.

Signed-off-by: Feifei Xu <[email protected]>
Signed-off-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Drop the unused header files in soc15.c.

Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/powerplay: add a framework for perfroming pre display
configuration change settings

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/powerplay: new framework to honour DAL clock limits

This is needed for vega12 and vega20 which do not support legacy
powerstate. With this new framework, the DAL clocks limits can also
be honored on these asics.

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/gfx9: Update golden setting for gfx9_0.

Update golden_settings_gc_9_0[].

Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm: rcar-du: Fix build failure

Commit 75a07f399cd4 ("drm: rcar-du: Zero-out sg_tables when duplicating
plane state") introduced a reference to the alpha field of struct
rcar_du_vsp_plane_state that got removed in commit 301a9b8d5456
("drm/rcar-du: Convert to the new generic alpha property"). The issue
stems from the merge of the two commits through separate branches and
breaks compilation of the driver. Fix it.

Fixes: 75a07f399cd4 ("drm: rcar-du: Zero-out sg_tables when duplicating plane state")
Signed-off-by: Laurent Pinchart <[email protected]>
Reviewed-by: Kieran Bingham <[email protected]>
Tested-by: Kieran Bingham <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]

drm: rcar-du: Fix rcar_du_of_init() stub

The rcar_du_of_init() function is supposed to be defined as a stub when
CONFIG_DRM_RCAR_LVDS is disabled as the rcar_du_of.c file isn't compiled
in that case. However, a bug in the configuration option check makes it
a stub when CONFIG_DRM_RCAR_LVDS=m as well, which prevents legacy DTs
from being fixed at boot time. Fix the configuration option check by
using IS_ENABLED.

Fixes: 81c0e3dd8292 ("drm: rcar-du: Fix legacy DT to create LVDS encoder nodes")
Signed-off-by: Laurent Pinchart <[email protected]>
Reviewed-by: Kieran Bingham <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]

drm/amdgpu: include pagemap.h for release_pages()

Fixes: 5ae0283e831a ("drm/amdgpu: Add userptr support for KFD"
Cc: Felix Kuehling <[email protected]>
Cc: Oded Gabbay <[email protected]>
Signed-off-by: Stephen Rothwell <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>

Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux into drm-next

Main changes for 4.18.  I'd like to do a separate pull for vega20 later
this week or next.  Highlights:
- Reserve pre-OS scanout buffer during init for seemless transition from
  console to driver
- VEGAM support
- Improved GPU scheduler documentation
- Initial gfxoff support for raven
- SR-IOV fixes
- Default to non-AGP on PowerPC for radeon
- Fine grained clock voltage control for vega10
- Power profiles for vega10
- Further clean up of powerplay/driver interface
- Underlay fixes
- Display link bw updates
- Gamma fixes
- Scatter/Gather display support on CZ/ST
- Misc bug fixes and clean ups

[airlied: fixup v3d vs scheduler API change]

Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Signed-off-by: Dave Airlie <[email protected]>

Merge tag 'drm-intel-next-2018-05-14' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

Last drm/i915 changes for v4.18:

- NV12 enabling (Chandra, Maarten)
- ICL workarounds (Oscar)
- ICL basic DPLL enabling (Paulo)
- GVT updates
- DP link config refactoring (Jani)
- Module parameter to override DMC firmware (Jani)
- PSR updates (José, DK, Daniel, Ville)
- ICL DP vswing programming (Manasi)
- ICL DBuf slice updates (Mahesh)
- Selftest fixes and updates (Chris, Matthew, Oscar)
- Execlist fixes and updates (Chris)
- Stolen memory first 4k fix (Hans de Goede)
- wait_for fixes (Mika)
- Tons of GEM improvements (Chris)
- Plenty of other fixes and improvements (Everyone)
- Crappy changelog (Me)

Signed-off-by: Dave Airlie <[email protected]>
# gpg: Signature made Mon 14 May 2018 11:04:24 PM AEST
# gpg:                using RSA key D398079D26ABEE6F
# gpg: Good signature from "Jani Nikula <[email protected]>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 1565 A65B 77B0 632E 1124  E59C D398 079D 26AB EE6F

# Conflicts:
# drivers/gpu/drm/i915/intel_lrc.c
# drivers/gpu/drm/i915/intel_sprite.c
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]

drm/scheduler: remove unused parameter

this patch also effect the amdgpu and etnaviv drivers which
use the function drm_sched_entity_init

Signed-off-by: Nayan Deshmukh <[email protected]>
Suggested-by: Christian König <[email protected]>
Acked-by: Lucas Stach <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

Add SPDX idenitifier and clarify license

This is dual licensed under GPL-2.0 or MIT.

Signed-off-by: Dirk Hohndel (VMware) <[email protected]>
Signed-off-by: Thomas Hellstrom <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: print the BO flags in the gem debugfs entry

Quite useful to know.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: drop printing the BO offset in the gem debugfs (v2)

It is meaningless anyway.

v2: remove unused variable (Alex)

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Add support to change mtype for 2nd part of gart BOs on GFX9

This change prepares for a workaround in amdkfd for a GFX9 HW bug. It
requires the control stack memory of compute queues, which is allocated
from the second page of MQD gart BOs, to have mtype NC, rather than
the default UC.

Signed-off-by: Yong Zhao <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/powerplay: Add notify PWE function to SMU10

Functionality to message smc to enable pwe after gpu suspense.
It is used in case when display resumes from S3 and wants to start
audio driver by enabling pwe.

Signed-off-by: Mikita Lipski <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: remove need of modeset flag for overlay planes (V2)

This patch is in continuation to the
"843e3c7 drm/amd/display: defer modeset check in dm_update_planes_state"
where we started to eliminate the dependency on
DRM_MODE_ATOMIC_ALLOW_MODESET to be set by the user space,
which as such is not mandatory.

After deferring, this patch eliminates the dependency on the flag
for overlay planes.

This has to be done in stages as its a pretty complex and requires thorough
testing before we free primary planes as well from dependency on modeset
flag.

V2: Simplified the plane type check.

Signed-off-by: Shirish S <[email protected]>
Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: fix null pointer for bo unmap trace function

fix crash in trace.

Signed-off-by: Junwei Zhang <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/gmc9: remove unused register defs

These got moved to the new df module so no longer
used in this file.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add HDP flush dummy for UVD 6/7

The UVD firmware doesn't seem to like the HDP flush here.

This worked for years without HDP flush, so just skip it.

Signed-off-by: Christian König <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: set ttm bo priority before initialization

Signed-off-by: Junwei Zhang <[email protected]>
Reviewed-by: David Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/ttm: remove priority hard code when initializing ttm bo

Then priority could be set before initialization.
By default, it requires to kzalloc ttm bo. In fact, we always do so.

Signed-off-by: Junwei Zhang <[email protected]>
Reviewed-by: David Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/pp: Fix performance drop on Fiji

The performance drop if the default TDP more than 256 Watt

Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/pp: Implement force_clock_level for RV

under manual dpm mode, user can set gfx/mem clock
through sysfs pp_dpm_sclk/mclk on Rv.

Reviewed-by: Evan Quan <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/powerplay: add PME smu message for raven

Used for working around an audio bug on some platforms.

Signed-off-by: Junwei Zhang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: clean up assignment of amdgpu_crtc

The declaration of pointer amdgpu_crtc has a redundant assignment to
amdgpu_crtc. Clean this up by removing it.

Detected by CoverityScan, CID#1460299 ("Evaluation order violation")

Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: Colin Ian King <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/powerplay: fix spelling mistake: "contruct" -> "construct"

Trivial fix to spelling mistake in PP_ASSERT_WITH_CODE message text

Signed-off-by: Colin Ian King <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/pp: Refine the output of pp_power_profile_mode on VI

In order to keep consist with Vega,
the output format of the pp_power_profile_mode would be
<integer><mode name string>< “*” for current profile>:"detail settings"
and remove the "CURRENT" mode line.

for example:
NUM        MODE_NAME     SCLK_UP_HYST   SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL     MCLK_UP_HYST   MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL
  0   3D_FULL_SCREEN:        0              100               30                0              100               10
  1     POWER_SAVING:       10                0               30                -                -                -
  2            VIDEO:        -                -                -               10               16               31
  3               VR:        0               11               50                0              100               10
  4          COMPUTE:        0                5               30                -                -                -
  5         CUSTOM *:        0                5               30                0              100               10
NUM        MODE_NAME     SCLK_UP_HYST   SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL     MCLK_UP_HYST   MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL
  0   3D_FULL_SCREEN:        0              100               30                0              100               10
  1   POWER_SAVING *:       10                0               30                0              100               10
  2            VIDEO:        -                -                -               10               16               31
  3               VR:        0               11               50                0              100               10
  4          COMPUTE:        0                5               30                -                -                -
  5           CUSTOM:        -                -                -                -                -                -

Reviewed-by: Evan Quan <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: invalidate parent bo when shadow bo was invalidated

Shadow BO is located on GTT and its parent (PT and PD) BO could located on VRAM.
In some case, the BO on GTT could be evicted but the parent did not. This may
cause the shadow BO not be put in the evict list and could not be invalidate
correctly.
v2: suggested by Christian

Signed-off-by: Chunming Zhou <[email protected]>
Reported-by: Shaoyun Liu <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: abstract bo_base init function

Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/amdgpu: Add some documentation to the debugfs entries

Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/amdgpu: vcn10 Add callback for emit_reg_write_reg_wait

The callback .emit_reg_write_reg_wait was missing for vcn decode
which resulted in a kernel oops.

Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Andrey Grodzovsky <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Fix display corruption on CI with dpm enabled

with dpm enabled, need to get active crtcs in dc/no-dc mode.

caused by
'commit ebb649667a31 ("drm/amdgpu: Set pm_display_cfg in non-dc mode")'

Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/pp: Skip fan attributes if fan not present

With powerplay enabled, also need to skip fan attributes
if no fan present.

Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Switch to interruptable wait to recover from ring hang.

v2:
Use dma_fence_wait instead of dma_fence_wait_timeout(...,MAX_SCHEDULE_TIMEOUT)
Avoid printing error message for ERESTARTSYS

Originally-by: David Panariti <[email protected]>
Signed-off-by: Andrey Grodzovsky <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/ttm: Use GFP_TRANSHUGE_LIGHT for allocating huge pages

GFP_TRANSHUGE tries very hard to allocate huge pages, which can result
in long delays with high memory pressure. I have observed firefox
freezing for up to around a minute due to this while restic was taking
a full system backup.

Since we don't really need huge pages, use GFP_TRANSHUGE_LIGHT |
__GFP_NORETRY instead, in order to fail quickly when there are no huge
pages available.

Set __GFP_KSWAPD_RECLAIM as well, in order for huge pages to be freed
up in the background if necessary.

With these changes, I'm no longer seeing freezes during a restic backup.

Cc: [email protected]
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: disable FBC on underlay pipe

FBC is not applicable for the underlay pipe,
hence disallow enabling and disabling of the same.

This also fixes the BUG hit of calling sleep in
atomic context.

Signed-off-by: Shirish S <[email protected]>
Reviewed-by: Roman Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: Use kvzalloc for potentially large allocations

Allocating up to 32 physically contiguous pages can easily fail (and has
failed for me), and isn't necessary anyway.

Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/uvd7: add emit_reg_write_reg_wait ring callback

Fix the NULL pointer dereference while running amdgpu_test:

[   54.972246] BUG: unable to handle kernel NULL pointer dereference at 0000000000000000
[   54.972265] IP:           (null)
[   54.972273] PGD 0 P4D 0
[   54.972280] Oops: 0010 [#1] SMP PTI
[   54.972288] Modules linked in: amdkfd amd_iommu_v2 amdgpu(OE) chash gpu_sched ttm drm_kms_helper drm i2c_algo_bit fb_sys_fops syscopyarea sysfillrect sysimgblt snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec_hdmi snd_hda_intel snd_hda_codec snd_hda_core snd_hwdep intel_rapl snd_pcm snd_seq_midi snd_seq_midi_event snd_rawmidi x86_pkg_temp_thermal intel_powerclamp coretemp kvm_intel snd_seq snd_seq_device kvm irqbypass snd_timer crct10dif_pclmul crc32_pclmul ghash_clmulni_intel pcbc snd soundcore joydev input_leds aesni_intel aes_x86_64 crypto_simd glue_helper cryptd idma64 virt_dma mei_me intel_lpss_pci serio_raw intel_cstate intel_rapl_perf shpchp intel_pch_thermal mei mac_hid intel_lpss acpi_pad parport_pc ppdev nfsd lp auth_rpcgss nfs_acl lockd grace sunrpc parport autofs4 hid_generic
[   54.972434]  usbhid mxm_wmi e1000e psmouse ahci hid libahci wmi pinctrl_sunrisepoint video pinctrl_intel
[   54.972457] CPU: 6 PID: 1393 Comm: uvd Tainted: G           OE    4.16.0-rc7-27fb84fda777 #1
[   54.972473] Hardware name: MSI MS-7984/Z170 KRAIT GAMING (MS-7984), BIOS B.80 05/11/2016
[   54.972489] RIP: 0010:          (null)
[   54.972497] RSP: 0018:ffffaea002c8bcc0 EFLAGS: 00010202
[   54.972508] RAX: 0000000000000000 RBX: ffff9d30d3c56f60 RCX: 00000000007c0002
[   54.972522] RDX: 000000000001a6fb RSI: 000000000001a6e9 RDI: ffff9d30d3c56f60
[   54.972536] RBP: ffffaea002c8bd10 R08: 0000000000000002 R09: ffffffffc06977d0
[   54.972550] R10: 0000000000000040 R11: 0000000000000000 R12: 0000000000000002
[   54.972564] R13: ffff9d30d3c5001c R14: ffff9d30d3c50000 R15: 0000000000000006
[   54.972579] FS:  0000000000000000(0000) GS:ffff9d30eed80000(0000) knlGS:0000000000000000
[   54.972594] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   54.972606] CR2: 0000000000000000 CR3: 00000002dbc0a001 CR4: 00000000003606e0
[   54.972620] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[   54.972634] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
[   54.972648] Call Trace:
[   54.972685]  ? gmc_v9_0_emit_flush_gpu_tlb+0x111/0x140 [amdgpu]
[   54.972721]  uvd_v7_0_ring_emit_vm_flush+0x31/0x70 [amdgpu]
[   54.972751]  amdgpu_vm_flush+0x5dc/0x6c0 [amdgpu]
[   54.972787]  ? pp_dpm_powergate_uvd+0x50/0x80 [amdgpu]
[   54.972816]  amdgpu_ib_schedule+0x120/0x4e0 [amdgpu]
[   54.972850]  amdgpu_job_run+0x17b/0x1c0 [amdgpu]
[   54.972861]  drm_sched_main+0x2cc/0x490 [gpu_sched]
[   54.972873]  ? wait_woken+0x80/0x80
[   54.972882]  kthread+0x121/0x140
[   54.972891]  ? drm_sched_job_finish+0xf0/0xf0 [gpu_sched]
[   54.972902]  ? kthread_create_worker_on_cpu+0x70/0x70
[   54.972914]  ret_from_fork+0x35/0x40
[   54.972922] Code:  Bad RIP value.
[   54.972932] RIP:           (null) RSP: ffffaea002c8bcc0
[   54.972943] CR2: 0000000000000000
[   54.972951] ---[ end trace 5feb349263bbf633 ]---

Signed-off-by: Xiaojie Yuan <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>