Tianling Shen [Tue, 9 Sep 2025 10:08:07 +0000 (18:08 +0800)]
rkbin: bump to latest git HEAD
Improved memory detection and stability.
Tested-by: FUKAUMI Naoki <[email protected]>
Signed-off-by: Tianling Shen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19998
Signed-off-by: Hauke Mehrtens <[email protected]>
Paweł Owoc [Sun, 7 Sep 2025 15:16:29 +0000 (17:16 +0200)]
mediatek: filogic: Add label wan and cpu for Zyxel EX5601-T0
Add labels wan and cpu for ethernet ports.
Signed-off-by: Paweł Owoc <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19968
Signed-off-by: Hauke Mehrtens <[email protected]>
Paweł Owoc [Sun, 7 Sep 2025 14:50:48 +0000 (16:50 +0200)]
mediatek: filogic: fix 5G MAC address for Zyxel EX5601
Currently 5G wireless interface MAC address is incorrect.
Fix by setting MAC address using Factory data.
Signed-off-by: Paweł Owoc <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19968
Signed-off-by: Hauke Mehrtens <[email protected]>
Paweł Owoc [Sat, 6 Sep 2025 18:49:04 +0000 (20:49 +0200)]
mediatek: filogic: Zyxel EX5601-T0 dts cleanup
Dts cleanup for Zyxel EX5601:
- duplicated code
- trailing zeros and whitespaces
Signed-off-by: Paweł Owoc <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19968
Signed-off-by: Hauke Mehrtens <[email protected]>
Paweł Owoc [Sat, 6 Sep 2025 18:04:09 +0000 (20:04 +0200)]
mediatek: filogic: fix fip partition size for Zyxel EX5601-T0
Fix incorrect "fip" partition size.
Signed-off-by: Paweł Owoc <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19968
Signed-off-by: Hauke Mehrtens <[email protected]>
Zhi-Jun You [Fri, 5 Sep 2025 04:43:12 +0000 (12:43 +0800)]
mediatek: filogic: use NVMEM for wifi macaddr on NWA50AX Pro
Convert NWA50AX Pro to use NVMEM framework for wifi macaddr.
Also remove the unused macaddr@a.
Signed-off-by: Zhi-Jun You <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19982
Signed-off-by: Hauke Mehrtens <[email protected]>
Zhi-Jun You [Fri, 5 Sep 2025 04:33:33 +0000 (12:33 +0800)]
mediatek: filogic: use NVMEM for EEPROM/precal on NWA50AX Pro
Convert NWA50AX Pro to use NVMEM framework for EEPROM/precal.
Signed-off-by: Zhi-Jun You <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19982
Signed-off-by: Hauke Mehrtens <[email protected]>
Rosen Penev [Tue, 19 Aug 2025 00:46:06 +0000 (17:46 -0700)]
ramips: e390ax: remove redundant 02_network MACs
These are already specified in DTS. Only thing missing is
label-mac-device.
Signed-off-by: Rosen Penev <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19806
Signed-off-by: Hauke Mehrtens <[email protected]>
Rosen Penev [Thu, 14 Aug 2025 00:22:35 +0000 (17:22 -0700)]
ramips: mt7621: set mac address in dts for DBDC
Support in mt76 has existed for quite a while. Use it.
Signed-off-by: Rosen Penev <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19806
Signed-off-by: Hauke Mehrtens <[email protected]>
Steffen Förster [Fri, 25 Apr 2025 16:27:05 +0000 (18:27 +0200)]
ramips: switched TP-Link RE305 v1 to new partition layout
After trying to implement the gluon support for this device I ended up in a boot loop due to the usable amount of flash left. With this patch layout it uses the unused and empty flash space in the original partiton layout.
The version 3 of this device the RE365 share the same approach to have more usable space.
Signed-off-by: Steffen Förster <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/18639
Signed-off-by: Sander Vanheule <[email protected]>
Andy Chiang [Tue, 9 Sep 2025 18:23:47 +0000 (01:23 +0700)]
kernel: r8168: add missing flags
PKG_MAKE_FLAGS is required when compiling r8168-rss
Signed-off-by: Andy Chiang <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/20001
Signed-off-by: Robert Marko <[email protected]>
Markus Stockhausen [Tue, 9 Sep 2025 06:25:00 +0000 (02:25 -0400)]
realtek: cleanup mach include
A lot of definitions in the global mach include have been taken over
to the individual drivers. Only a few of the definitions are really
used nowadays. Remove all the unneeded lines.
Signed-off-by: Markus Stockhausen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19995
Signed-off-by: Robert Marko <[email protected]>
Felix Fietkau [Wed, 10 Sep 2025 04:29:29 +0000 (06:29 +0200)]
kernel: backport patch to allow bpf fallback to interpreter
Deal with JIT failure more gracefully
Fixes: https://github.com/openwrt/openwrt/issues/19405
Signed-off-by: Felix Fietkau <[email protected]>
Felix Fietkau [Tue, 9 Sep 2025 16:30:52 +0000 (18:30 +0200)]
mt76: update to Git HEAD (2025-09-09)
27ad37728c3f wifi: mt76: mt7996: Check phy before init msta_link in mt7996_mac_sta_add_links()
95c9b8099ede wifi: mt76: mt7996: Set EML capabilities for AP interface
08df8dd7b00b wifi: mt76: mt7996: Use proper link_id in link_sta_rc_update callback
15fa4e33ee8f wifi: mt76: mt7996: Enable MLO support for client interfaces
3400b1ba33be wifi: mt76: mt7925: add pci restore for hibernate
51a1c0a086c8 wifi: mt76: mt7921: Add 160MHz beamformee capability for mt7922 device
435e596914fa wifi: mt76: mt7996: Use proper link info in mt7996_mcu_add_group
d30faac3b645 firmware: update mt7996 and mt7992 firmware to
20250606
304226bc4552 wifi: mt76: mt7996: Fix mt7996_reverse_frag0_hdr_trans for MLO
7cf18f8ebbb8 wifi: mt76: mt7996: Add all active links to poll list in mt7996_mac_tx_free()
16090cb27d9f wifi: mt76: mt7996: Implement MLD address translation for EAPOL
a1c319500a53 wifi: mt76: mt7996: Temporarily disable EPCS
5f3ea4562fbf wifi: mt76: mt7921: Place upper limit on station AID
ef2468830f6d wifi: mt76: un-embedd netdev from mt76_dev
29bca0ca462b net: mediatek: wed: Introduce MT7992 WED support to MT7988 SoC
245f6ff460c8 wifi: mt76: Add reset_idx to reset_q mt76_queue_ops signature.
4a3a5a7d71a8 wifi: mt76: Remove q->ndesc check in mt76_dma_rx_fill()
d540538299f7 wifi: mt76: Differentiate between RRO data and RRO MSDU queues
d0217732f96e wifi: mt76: Do not always enable NAPIs for WED RRO queues
1df790839241 wifi: mt76: mt7996: Initial DMA configuration for MT7992 WED support
fca511f401e9 wifi: mt76: mt7996: Enable HW RRO for MT7992 chipset
8134055d3459 wifi: mt76: mt7996: Introduce the capability to reset MT7992 WED device
4f81d751b5de wifi: mt76: mt7996: Fix tx-queues initialization for second phy on mt7996
f559eef156fd wifi: mt76: mt7996: Fix RX packets configuration for primary WED device
6b518355fec6 wifi: mt76: mt7996: Enable WED for MT7992 chipset
13eb05fa4a43 wifi: mt76: mt7996: Introduce RRO MSDU callbacks
ac1bca49973b wifi: mt76: Add rx_queue_init callback
d82330a9d019 wifi: mt76: mt7996: Decouple RRO logic from WED support
0a32ae3cc23d wifi: mt76: Add mt76_dma_get_rxdmad_c_buf utility routione
6c902ccba889 wifi: mt76: mt7996: Add SW path for HW-RRO v3.1
f271ce48d73b mt76: mt7996: fix unsigned comparison
d48b221e39f1 wifi: mt76: mt7925: prevent NULL vif dereference in mt7925_mac_write_txwi
719cda7c9f18 wifi: mt76: mt7925: prevent NULL pointer dereference in mt7925_tx_check_aggr()
03b0c871630a wifi: mt76: mt7996: add missing NULL pointer check
91dcccebfe19 firmware: update mt7996/mt7992 firmware to
20250905
76401f5e2e05 mt76: update RRO patches to the latest version
7b4b6c844554 wifi: mt76: Convert mt76_wed_rro_ind to LE
0d6eaa417441 wifi: mt76: mt7915: fix mt7981 pre-calibration
015349622b0c wifi: mt76: mt7925: fix incorrect length field in txpower command
5776b3292908 wifi: mt76: mt7925: refine the txpower initialization flow
b50c633f9158 wifi: mt76: mt7996: support writing MAC TXD for AddBA Request
ea9998693579 wifi: mt76: mt7996: Add missing DMA sync for EAPOL frames
a4d6f193be22 wifi: mt76: mt7996: remove redundant per-phy mac80211 calls during restart
ffda4432654d wifi: mt76: mt7996: improve hardware restart reliability
a6559a003d1b wifi: mt76: mt7996: decrease timeout for commonly issued MCU commands
Signed-off-by: Felix Fietkau <[email protected]>
Felix Fietkau [Mon, 14 Jul 2025 09:55:10 +0000 (11:55 +0200)]
kernel: improve mtk_eth_soc performance
- shrink data structures
- avoid unnecessary divisions
- support GSO fraglist on tx
Reapply with fixed patch
Signed-off-by: Felix Fietkau <[email protected]>
Andy Chiang [Sun, 7 Sep 2025 18:39:53 +0000 (01:39 +0700)]
mac80211: use https instead of http
Use CDN first, if fails, it will use https://mirror2.openwrt.org/sources
Signed-off-by: Andy Chiang <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19979
Signed-off-by: Hauke Mehrtens <[email protected]>
Weijie Gao [Sun, 7 Sep 2025 19:37:46 +0000 (03:37 +0800)]
loongarch64: switch to Linux 6.12 by default
Use Linux kernel version 6.12 by default for loongarch64 target.
Signed-off-by: Weijie Gao <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19980
Signed-off-by: Hauke Mehrtens <[email protected]>
Elbert Mai [Sat, 12 Jul 2025 12:58:59 +0000 (05:58 -0700)]
bcm2712: add kmod-r8169 and kmod-usb-net-rtl8152
Boards such as [1] and [2] add an extra Ethernet port to Raspberry Pi (CM)5.
These typically use Realtek PCIe or USB Ethernet NICs. Include kmod-r8169 and
kmod-usb-net-rtl8152 by default to make it easy to configure LAN/WAN ports
with these parts on Raspberry Pi 5.
Because CM5 can fit in the same carrier boards as CM4, also ensure that both
devices have the same Ethernet NIC kmods.
[1]: https://www.waveshare.com/wiki/CM5-DUAL-ETH-MINI
[2]: https://www.waveshare.com/wiki/PCIe_TO_Gigabit_ETH_Board_(C)
Signed-off-by: Elbert Mai <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19384
Signed-off-by: Hauke Mehrtens <[email protected]>
Zoltan HERPAI [Mon, 11 Aug 2025 16:58:20 +0000 (18:58 +0200)]
sunxi: enable at24 support
Certain boards have an at24(-compatible) EEPROM for storing various
parameters like MAC addresses. Enable support for this hardware across
the whole target.
Signed-off-by: Zoltan HERPAI <[email protected]>
Zoltan HERPAI [Mon, 11 Aug 2025 16:59:04 +0000 (18:59 +0200)]
uboot-sunxi: randomize ethaddr on Olimex A20 boards
While these boards have an at24 EEPROM for storing the MAC address,
early revisions (up until about 2017) did not contain actual addresses.
Create a random address to have ethernet function properly in u-boot.
Signed-off-by: Zoltan HERPAI <[email protected]>
Christian Marangi [Mon, 8 Sep 2025 18:22:09 +0000 (20:22 +0200)]
airoha: backport upstream fixes for pinctrl PHY LED and MDIO
Backport fixes for Airoha pinctrl driver for PHY LED and MDIO bus. This
fix a copy-paste error for PHY LED and a misconfiguration for MT7530
embedded Switch MDIO bus GPIO pin to permit usage of external PHYs.
Signed-off-by: Christian Marangi <[email protected]>
Tianling Shen [Sun, 31 Aug 2025 14:32:15 +0000 (22:32 +0800)]
rockchip: increase the number of serial ports for rk35xx
The RK356x/RK3588 SoCs support up to 10 serial ports.
Signed-off-by: Tianling Shen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19917
Signed-off-by: Hauke Mehrtens <[email protected]>
Jan Kardell [Mon, 8 Sep 2025 06:52:40 +0000 (08:52 +0200)]
libxml2: Add abi version
The version of libxml2 was bumped from 2.13.6 to 2.14.5. Since version
2.14, libxml2 is not binary compatible with older versions. Therefore
add an abi version.
From the NEWS file:
Binary compatibility is restricted to versions 2.14 or newer. On ELF
systems, the soname was bumped from libxml2.so.2 to libxml2.so.16.
Signed-off-by: Jan Kardell <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19983
Signed-off-by: Hauke Mehrtens <[email protected]>
Fabrice Fontaine [Wed, 3 Sep 2025 09:31:52 +0000 (11:31 +0200)]
package/libs/gettext-full: fix license
gettext-full only provides libintl which is not licensed under
GPL-3.0.-or-later but under LGPL-2.1-or-later as stated in
gettext-runtime/intl/COPYING.LIB
Fixes: c10d97484a43375a0446dafc8cb4072e26502f37 (Add more license tags with SPDX identifiers)
Signed-off-by: Fabrice Fontaine <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19943
Signed-off-by: Hauke Mehrtens <[email protected]>
Fabrice Fontaine [Wed, 3 Sep 2025 06:46:45 +0000 (08:46 +0200)]
package/libs/elfutils: fix license
elfutils libraries are not licensed under GPL-3.0-or-later, they are dual
licensed: GPL-2.0-or-later OR LGPL-3.0-or-later as clearly stated in
source files as well as on https://sourceware.org/elfutils:
The libraries and backends are dual GPLv2+/LGPLv3+. The utilities are GPLv3+.
Fixes: b98fb7664639a814f3dba309eaf38b62be137bb8 (elfutils: import package from packages.git)
Signed-off-by: Fabrice Fontaine <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19941
Signed-off-by: Hauke Mehrtens <[email protected]>
Marcos Alano [Wed, 27 Aug 2025 11:35:37 +0000 (08:35 -0300)]
build: Add compatibility with uutils' coreutils
Add support so openwrt can be compiled using
coreutils from GNU or uutils.
Signed-off-by: Marcos Alano <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19883
Signed-off-by: Hauke Mehrtens <[email protected]>
Tianling Shen [Mon, 1 Sep 2025 09:53:18 +0000 (17:53 +0800)]
rockchip: backport GATE_LINK support for RK3588
Apart from improved power consumption, this fixes the runtime errors
from the pmdomain driver (failed to set idle on domain '%s')
Backport four clk fixes while at it.
Signed-off-by: Tianling Shen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19925
Signed-off-by: Hauke Mehrtens <[email protected]>
Tianling Shen [Mon, 1 Sep 2025 09:48:18 +0000 (17:48 +0800)]
rockchip: refresh and reorder patches
- Replace NanoPi R3S patch with upstreamed version
- Merge NanoPC T6 mmc fixes patches
- Reorder patches to start from 001
Signed-off-by: Tianling Shen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19925
Signed-off-by: Hauke Mehrtens <[email protected]>
Rhnn Hur [Sun, 20 Oct 2024 11:14:28 +0000 (20:14 +0900)]
mediatek: filogic: add support for ipTIME AX3000M
ipTIME AX3000M is an 802.11ax (Wi-Fi 6) router, based on MediaTek
MT7981B. (Filogic 820)
Specifications:
* SoC: MetiaTek MT7981B
* RAM: 256MiB
* Flash: ESMT SPI-NAND F50L1G41LB 128MiB
* Wi-Fi:
* MediaTek MT7915E: 2.4GHz and 5GHz
* Ethernet: 5x 1GbE
* Switch: MediaTek MT7531
* USB: 1x 3.0
* UART: J4 (115200 baud)
* LED:
* PWR: VCC
* CPU, 2.4G, 5G: GPIO
* LAN 1-4, WAN: Controlled by Switch
MAC Addresses:
* 2.4G, 5G: B0:XX:XX:04:2A:60 (factory 0x4)
* WAN: B0:XX:XX:04:2A:61 (factory 0x4, +1)
* LAN: B0:XX:XX:04:2A:63 (factory 0x4, +3)
MTD Partitions:
* 0x000000000000-0x000000100000 : "BL2"
* 0x000000100000-0x000000180000 : "u-boot-env"
* 0x000000180000-0x000000380000 : "Factory"
* 0x000000380000-0x000000580000 : "FIP"
* 0x000000580000-0x000007380000 : "ubi"
UBI Partitions (Dynamic):
* id: 0, kernel2
* id: 1, kernel
* id: 2, rootfs
* id: 3, rootfs_data
* id: 4, rootfs2
Installation:
* Upload factory image through the tftp recovery mode.
Notes:
* This device has a dual-boot partition scheme, if installing with the
stock web interface method will flash only on the inactive ubi partitions
which are kernel and rootfs, newly flashed kernel didn't know the proper
rootfs partition so the booted kernel will panic.
Tested-by: Rhnn Hur <[email protected]>
Signed-off-by: Rhnn Hur <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/16643
Signed-off-by: Hauke Mehrtens <[email protected]>
Aleksander Jan Bajkowski [Sat, 6 Sep 2025 20:19:22 +0000 (22:19 +0200)]
zynq: disable unused Vitesse PHY
All devices supported by the Zynq target have either a Realtek or Marvell
PHY. The Vitesse PHY was enabled when the target was created (
2d45ad07fc64).
It's not used here, so it's safe to disable it.
Ethernet PHYs used by individual devices are listed below.
Device PHY
AVNET ZedBoard Marvell
88E1518
Digilent Zybo Realtek RTL8211E
Digilent Zybo Z7 Realtek RTL8211E or RTL8211F
Xilinx ZC702 Marvell 88E1116R
Signed-off-by: Aleksander Jan Bajkowski <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19969
Signed-off-by: Hauke Mehrtens <[email protected]>
Aleksander Jan Bajkowski [Sat, 6 Sep 2025 20:18:01 +0000 (22:18 +0200)]
zynq: refresh config
This was done by executing these command:
$ make kernel_oldconfig CONFIG_TARGET=platform
Signed-off-by: Aleksander Jan Bajkowski <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19969
Signed-off-by: Hauke Mehrtens <[email protected]>
Mikhail Zhilkin [Fri, 29 Aug 2025 19:24:19 +0000 (22:24 +0300)]
mediatek: CMCC RAX3000M: add RAX3000Me as alt model
The devices are basically identical. The RAX3000Me can be with
ddr3 RAM.
Signed-off-by: Mikhail Zhilkin <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19760
Signed-off-by: Hauke Mehrtens <[email protected]>
Tianling Shen [Sun, 10 Aug 2025 15:14:10 +0000 (23:14 +0800)]
kernel: add support for FudanMicro FM25S01A SPI-NAND
Add support for FudanMicro FM25S01A SPI NAND.
Datasheet: http://eng.fmsh.com/nvm/FM25S01A_ds_eng.pdf
Signed-off-by: Tianling Shen <[email protected]>
[add lore.kernel.org link to the patch files]
Signed-off-by: Mikhail Zhilkin <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19760
Signed-off-by: Hauke Mehrtens <[email protected]>
Mikhail Zhilkin [Thu, 14 Aug 2025 16:15:09 +0000 (19:15 +0300)]
uboot-mediatek: add support for FudanMicro FM25S01A
This patch adds support for FudanMicro FM25S01A SPI NAND. It's required
for some CMCC RAX3000Me hardware revisions.
The patch was partially taken from ImmortalWrt.
Link:
https://raw.githubusercontent.com/immortalwrt/immortalwrt/refs/heads/master/package/boot/uboot-mediatek/patches/342-mtd-spinand-Support-fmsh.patch
Signed-off-by: Mikhail Zhilkin <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19760
Signed-off-by: Hauke Mehrtens <[email protected]>
Mikhail Zhilkin [Wed, 13 Aug 2025 19:46:54 +0000 (22:46 +0300)]
arm-trusted-firmware-mediatek: add FudanMicro manufacturer
Add FudanMicro manufacturer.
Signed-off-by: Mikhail Zhilkin <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19760
Signed-off-by: Hauke Mehrtens <[email protected]>
Mikhail Zhilkin [Tue, 12 Aug 2025 19:49:29 +0000 (22:49 +0300)]
uboot-mediatek: CMCC RAX3000M: add ddr3 build
This commit adds ddr3 build for the ddr3 variant of the CMCC RAX3000Me
router.
Signed-off-by: Mikhail Zhilkin <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19760
Signed-off-by: Hauke Mehrtens <[email protected]>
Mikhail Zhilkin [Tue, 12 Aug 2025 19:48:13 +0000 (22:48 +0300)]
uboot-mediatek: CMCC RAX3000M: add Airoha AN8855 switch support
This commit adds support for Airoha AN8855 switch. Some CMCC RAX3000Me hw
revisions are shipped with Airoha switch.
Signed-off-by: Mikhail Zhilkin <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19760
Signed-off-by: Hauke Mehrtens <[email protected]>
Michal Halva [Sat, 2 Aug 2025 18:46:14 +0000 (20:46 +0200)]
mediatek: filogic: add support for Cudy WR3000P v1
Hardware
--------
MediaTek MT7981 WiSoC
512MB DDR4 RAM
128MB SPI-NAND
MediaTek MT7981 2x2 DBDC 802.11ax 2T2R (2.4 / 5)
4 LAN MediaTek MT7531 PHY
1 WAN RTL8221B-VB-CG 2.5Gbps PHY
UART: 115200 8N1 3.3V
USB2 Port
PoE on WAN Port
MAC:
LAN MAC: label mac
WAN MAC: label mac + 1
2.4G MAC: label mac
5G MAC: label mac + 1 with LA bit set
Gotchas:
WAN LED does not light up (might require further DTS tweaks)
PoE on WAN port was not tested
This commit is heavily based on WR3000H one, I've just ported DTS differences
from the official image to get USB support and proper LED mapping.
Installation
------------
[Untested as I've received and used a transitional image from Cudy]
1. Connect to the serial port as described in the "Hardware" section.
2. Power on the device + press reset pin. Keep pressing reset pin to enter the U-Boot shell.
3. Download the OpenWrt initramfs image. Place it on an TFTP server
connected to the Cudy LAN ports. Make sure the server is reachable at
192.168.1.88. Rename the image to "cudy3000p.bin"
4. Download and boot the OpenWrt initramfs image.
$ tftpboot 0x46000000 cudy3000s.bin; bootm 0x46000000
5. Transfer the OpenWrt sysupgrade image to the device using scp.
Install with sysupgrade.
Signed-off-by: Michal Halva <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19636
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Wed, 3 Sep 2025 02:02:48 +0000 (02:02 +0000)]
rockchip: add support for Radxa E52C
The Radxa E52C is a compact network computer using the Rockchip RK3582
SoC.
- https://radxa.com/products/network-computer/e52c
Hardware
--------
- Dual Cortex-A76 and Quad Cortex-A55 CPU
- 5 TOPS NPU
- 2/4/8GB LPDDR4 RAM
- 16/32/64GB on-board eMMC
- microSD card slot
- 2x 2.5 Gigabit Ethernet ports
- USB 3.1 Gen1 Type-A HOST/OTG port
- USB Type-C debug port
- USB Type-C power port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Wed, 3 Sep 2025 02:02:46 +0000 (02:02 +0000)]
rockchip: add support for Radxa ROCK 5C/5C Lite
The Radxa ROCK 5C (Lite) is a single board computer using the Rockchip
RK3588S2 (RK3582) SoC.
- https://radxa.com/products/rock5/5c
Hardware
--------
- Quad (Dual) Cortex-A76 and Quad Cortex-A55 CPU
- Mali-G610 MP4 GPU (5C only)
- 6 (5) TOPS NPU
- 1/2/4/8/16/32GB LPDDR4X RAM
- eMMC/SPI NOR flash connector
- microSD card slot
- Wi-Fi 6 (AIC8800D80, not yet supported)
- Gigabit Ethernet port with PoE (additional PoE HAT required)
- USB 3.1 Gen1 Type-A HOST/OTG port
- USB 3.1 Gen1 Type-A HOST port
- 2x USB 2.0 Type-A HOST ports
- FPC connector with PCIe 2.1 x1
- PWM fan connector
- 20x2 pin header
- USB Type-C power port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Wed, 3 Sep 2025 02:02:44 +0000 (02:02 +0000)]
rockchip: add support for Radxa ROCK 5 ITX/ITX+
The Radxa ROCK 5 ITX(+) is a Mini-ITX form factor computer using the
Rockchip RK3588 SoC.
- https://radxa.com/products/rock5/5itx
- https://radxa.com/products/rock5/5itxp
Hardware
--------
- Quad Cortex-A76 and Quad Cortex-A55 CPU
- Mali-G610 MP4 GPU
- 6 TOPS NPU
- 4/8/16/24/32GB LPDDR5 RAM
- on-board eMMC
- 16MB SPI NOR flash
- microSD card slot
- 2x 2.5 Gigabit Ethernet ports with PoE (additional PoE module required)
- USB 3.1 Gen1 Type-C HOST/OTG port
- 4x USB 3.1 Gen1 Type-A HOST ports
- 2x USB 2.0 Type-A HOST ports
- M.2 M Key connector with PCIe 3.0 x2
- 4x SATA connectors (ITX only)
- 2nd M.2 M Key connector with PCIe 3.0 x2 (ITX+ only)
- M.2 E Key connector with PCIe 2.1 x1 and USB 2.0
- RTC battery socket for CR1220
- 4pin PWM fan connector
- Serial console pin header
- Front panel pin headers
- 24pin ATX power connector
- 5525 12V DC jack
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Wed, 3 Sep 2025 02:02:41 +0000 (02:02 +0000)]
rockchip: add support for Radxa ROCK 5T
The Radxa ROCK 5T is a single board computer using the Rockchip
RK3588(J) SoC.
- https://radxa.com/products/rock5/5t
Hardware
--------
- Quad Cortex-A76 and Quad Cortex-A55 CPU
- Mali-G610 MP4 GPU
- 6 TOPS NPU
- 4/8/16/24/32GB LPDDR5 RAM
- 16/32/64/128/256GB on-board eMMC (optional)
- 16MB SPI NOR flash
- microSD card slot
- Wi-Fi 6E (Intel AX210, limited support)
- 2x 2.5 Gigabit Ethernet ports with PoE (additional PoE module required)
- USB 3.1 Gen1 Type-C HOST/OTG port
- 2x USB 3.1 Gen1 Type-A HOST ports
- 2x USB 2.0 Type-A HOST ports
- 2x M.2 M Key connectors with PCIe 3.0 x2
- M.2 B Key connector
- SIM card slot
- RTC battery connector
- PWM fan connector
- 20x2 pin header
- 5525 12V DC jack
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Wed, 3 Sep 2025 02:02:37 +0000 (02:02 +0000)]
rockchip: add support for Radxa ROCK 5B+
The Radxa ROCK 5B+ is a single board computer using the Rockchip
RK3588 SoC.
- https://radxa.com/products/rock5/5bp
Hardware
--------
- Quad Cortex-A76 and Quad Cortex-A55 CPU
- Mali-G610 MP4 GPU
- 6 TOPS NPU
- 4/8/16/24/32GB LPDDR5 RAM
- 16/32/64/128/256GB on-board eMMC (optional)
- 16MB SPI NOR flash
- microSD card slot
- Wi-Fi 6 (Realtek RTW8852BE)
- 2.5 Gigabit Ethernet port with PoE (additional PoE HAT required)
- USB 3.1 Gen1 Type-C HOST/OTG port
- 2x USB 3.1 Gen1 Type-A HOST ports
- 2x USB 2.0 Type-A HOST ports
- 2x M.2 M Key connectors with PCIe 3.0 x2
- M.2 B Key connector
- SIM card slot
- RTC battery connector
- PWM fan connector
- 20x2 pin header
- USB Type-C power port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Tue, 2 Sep 2025 05:12:08 +0000 (05:12 +0000)]
rockchip: add M.2 M/E key modules support for Radxa ROCK 5B
Add support for M.2 M/E key modules.
- NVMe
- Radxa Wireless Module A8 (Realtek RTL8852BE)
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Tue, 2 Sep 2025 05:12:03 +0000 (05:12 +0000)]
rockchip: add HATs/M.2 E key module support for Radxa ROCK 5A
Add support for Radxa HATs/M.2 E key module.
- Radxa Dual 2.5G Router HAT (Realtek RTL8125BG/NVMe)
- Radxa Penta SATA HAT (JMicron JMB585)
- Radxa Wireless Module A8 (Realtek RTL8852BE)
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Mon, 25 Aug 2025 15:32:10 +0000 (15:32 +0000)]
uboot-rockchip: add support for Rockchip RK3582
Import patches from
https://patchwork.ozlabs.org/project/uboot/list/?series=468562
Apply patch 3/3 partially due to conflicts.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Mon, 25 Aug 2025 15:32:07 +0000 (15:32 +0000)]
uboot-rockchip: prepare for Rockchip RK3582
Use "rk358x" for RK3588, RK3588S, and upcoming RK3582.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Tue, 2 Sep 2025 02:42:55 +0000 (02:42 +0000)]
rockchip: backport dts changes for Radxa E52C
Backport dts changes up to Linux v6.17 for Radxa E52C.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Tue, 2 Sep 2025 02:42:51 +0000 (02:42 +0000)]
rockchip: backport dts changes for Radxa ROCK 5C/5C Lite
Backport dts changes up to Linux v6.17 for Radxa ROCK 5C and 5C Lite.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Tue, 2 Sep 2025 02:42:48 +0000 (02:42 +0000)]
rockchip: backport dts changes for Radxa ROCK 5 ITX/ITX+
Backport dts changes up to Linux v6.17 for Radxa ROCK 5 ITX and ITX+.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Tue, 2 Sep 2025 02:42:46 +0000 (02:42 +0000)]
rockchip: backport dts changes for Radxa ROCK 5B/5B+/5T
Backport dts changes up to Linux v6.17 for Radxa ROCK 5B, 5B+, and 5T.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Tue, 2 Sep 2025 02:42:43 +0000 (02:42 +0000)]
rockchip: backport dts changes for Radxa ROCK 5A
Backport dts changes up to Linux v6.17 for Radxa ROCK 5A.
Use power(green) LED instead of heartbeat(blue) LED.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Tue, 2 Sep 2025 02:42:38 +0000 (02:42 +0000)]
rockchip: backport dts changes for Rockchip RK358x
Backport dts changes up to Linux v6.17 for Rockchip RK358x.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
FUKAUMI Naoki [Mon, 25 Aug 2025 15:31:50 +0000 (15:31 +0000)]
generic: 6.12: backport gated-fixed-clk driver
Backport gated-fixed-clk driver from Linux v6.13.
This is needed to fix a PCIe controller probe hang on the Radxa ROCK 5
ITX.
Signed-off-by: FUKAUMI Naoki <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <[email protected]>
Fil Dunsky [Wed, 20 Aug 2025 13:15:55 +0000 (16:15 +0300)]
mediatek: Huasifei WH3000 Pro wifi fix
typo forgot to add `kmod-mt7915e`
Fixes: db1de8d21fd7 ("mediatek: add Huasifei WH3000 Pro support")
Signed-off-by: Fil Dunsky <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19825
Signed-off-by: Hauke Mehrtens <[email protected]>
Goetz Goerisch [Thu, 4 Sep 2025 16:07:03 +0000 (18:07 +0200)]
kernel: bump 6.6 to 6.6.104
remove upstreamed patches:
generic/backport-6.6/626-v6.17-net-ipv4-fix-regression-in-local-broadcast-routes.patch [1]
All other patches auto-refreshed.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.104&id=
a208d67cb44ba441bd38e04e270e9f1e230234ee
Signed-off-by: Goetz Goerisch <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19955
Signed-off-by: Hauke Mehrtens <[email protected]>
John Audia [Thu, 4 Sep 2025 18:45:36 +0000 (14:45 -0400)]
kernel: bump 6.12 to 6.12.45
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.12.45
Removed upstreamed:
generic/backport-6.12/626-v6.17-net-ipv4-fix-regression-in-local-broadcast-routes.patch[1]
mediatek/patches-6.12/051-v6.17-thermal-drivers-mediatek-lvts_thermal-Change-lvts-co.patch[2]
mediatek/patches-6.12/052-v6.17-thermal-drivers-mediatek-lvts_thermal-Add-lvts-comma.patch[3]
mediatek/patches-6.12/053-v6.17-thermal-drivers-mediatek-lvts_thermal-Add-mt7988-lvt.patch[4]
All other patches automatically rebased.
1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.12.45&id=
81ff76c1b08827bc81779400a3640f102a9a9ade
2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.12.45&id=
d1f4b09d9bb991c0fe039511520c6e59f1b42ec1
3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.12.45&id=
739229eb4d5cd009d81ad8946fdd4bb5ec790c2e
4. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.12.45&id=
9a7141d4808dcb833f87154af88560c785306cd2
Build system: x86/64
Build-tested: flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3, x86/64-glibc
Run-tested: flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3, x86/64-glibc
Signed-off-by: John Audia <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19956
Signed-off-by: Hauke Mehrtens <[email protected]>
John Audia [Sat, 6 Sep 2025 08:17:03 +0000 (04:17 -0400)]
lantiq: adapt upstream commit to some dts files
Some lantiq dts files still use etop but 6.12.45[1] changed to ethernet
so bring them into parity with this change.
1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.12.y&id=
8c431ea8f3f795c4b9cfa57a85bc4166b9cce0ac
Co-Authored-by: Hauke Mehrtens <[email protected]>
Co-Authored-by: Aleksander Bajkowski <[email protected]>
Signed-off-by: John Audia <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19956
Signed-off-by: Hauke Mehrtens <[email protected]>
Markus Stockhausen [Wed, 3 Sep 2025 08:16:31 +0000 (04:16 -0400)]
realtek: carve out mdio bus from ethernet driver
So much code was distributed between phy/ethernet/dsa drivers. A lot
was already cleand up before. With this step the mdio bus gets its
own space and is no longer hidden inside the ethernet driver.
This commit is mostly a copy/paste that includes only minor changes.
- define prefixes are renamed to RTMDIO
- The driver is totally self contained (does not rely on SoC include)
- The DTS structure (mdio node below ethernet node) was kept
- The driver is added to the kernel config of all subtargets.
Signed-off-by: Markus Stockhausen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19942
Signed-off-by: Robert Marko <[email protected]>
Markus Stockhausen [Wed, 3 Sep 2025 08:02:51 +0000 (04:02 -0400)]
realtek: early ethernet probe in dsa setup
The ethernet and mdio code will be splitted. The dsa driver depends
on proper loading of both, before switch setup can start. Sadly there
are severe cleanup issues in the probe() function if one of the
required devices is not available.
As a temporary workaround provide a dedicated check function that
verifies if the ethernet platform device driver is loaded and can
be used.
Signed-off-by: Markus Stockhausen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19942
Signed-off-by: Robert Marko <[email protected]>
Shiji Yang [Fri, 5 Sep 2025 23:29:41 +0000 (07:29 +0800)]
ramips: fix wrong CRLF line-ending
Use Unix LF style instead of Windows CRLF style.
Signed-off-by: Shiji Yang <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19963
Signed-off-by: Robert Marko <[email protected]>
Markus Stockhausen [Fri, 5 Sep 2025 06:53:41 +0000 (02:53 -0400)]
realtek: make NAPI polling thread safe
At the end of RX NAPI polling the counter and mask registers are
cleaned up. Although this might run in parallel there is no
synchronization and the register modifications are some wild mix.
RTL83xx enables only the interrupt of a single ring while RTL93xx
just reactivates all interrupts (even for other NAPI threads).
Make use of the driver lock and only modify the interrupt bits that
the current thread owns.
Signed-off-by: Markus Stockhausen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19960
Signed-off-by: Robert Marko <[email protected]>
Markus Stockhausen [Fri, 5 Sep 2025 06:33:56 +0000 (02:33 -0400)]
realtek: RTL93xx: do not drop packets in software
Now that the counter registers work fine there is no need to
free buffers in software. Hardware will automatically block
input processing when software processing is too slow.
Signed-off-by: Markus Stockhausen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19960
Signed-off-by: Robert Marko <[email protected]>
Markus Stockhausen [Fri, 5 Sep 2025 06:31:53 +0000 (02:31 -0400)]
realtek: RTL93xx: Make use of correct ring size counters
The receive path of the RTL93xx SoCs is currently discarding packets
in software. Analysis gives the following explanation:
- RX ring size registers are setup with the full software ring size
- When packets are received the packet counter registers are increased
- After RX processing the counter registers are changed the wrong way
- From then SOC is allowed to receive more packets than software allows
- Overflow interrupts are fired
- As a reaction to that the software drops packets
Change the processing as follows:
- Setup ring size registers with a headroom of 2 buffers
- Decrease the counter registers with the real work done
With this change no more overflow interrupts occur because the SoC
disables the queues before they can overflow or hit a buffer that is
still owned by the CPU.
Benchmark from single stream iperf3 run, with server process running
on ZyXEL XGS1210 (RTL930x).
iperf3 run before
-----------------------------------------------------------
Server listening on 5201 (test #1)
-----------------------------------------------------------
Accepted connection from 192.168.2.86, port 54412
[ 5] local 192.168.2.71 port 5201 connected to 192.168.2.86 port 54418
[ ID] Interval Transfer Bitrate
[ 5] 0.00-1.00 sec 384 KBytes 3.14 Mbits/sec
[ 5] 1.00-2.00 sec 0.00 Bytes 0.00 bits/sec
[ 5] 2.00-3.00 sec 0.00 Bytes 0.00 bits/sec
[ 5] 3.00-4.01 sec 5.12 MBytes 42.8 Mbits/sec
[ 5] 4.01-5.00 sec 11.4 MBytes 95.8 Mbits/sec
[ 5] 5.00-6.00 sec 0.00 Bytes 0.00 bits/sec
[ 5] 6.00-7.00 sec 0.00 Bytes 0.00 bits/sec
[ 5] 7.00-8.00 sec 0.00 Bytes 0.00 bits/sec
[ 5] 8.00-9.00 sec 0.00 Bytes 0.00 bits/sec
[ 5] 9.00-10.00 sec 0.00 Bytes 0.00 bits/sec
iperf3 run after
-----------------------------------------------------------
Server listening on 5201 (test #1)
-----------------------------------------------------------
Accepted connection from 192.168.2.86, port 55228
[ 5] local 192.168.2.71 port 5201 connected to 192.168.2.86 port 55232
[ ID] Interval Transfer Bitrate
[ 5] 0.00-1.00 sec 22.8 MBytes 191 Mbits/sec
[ 5] 1.00-2.01 sec 25.4 MBytes 211 Mbits/sec
[ 5] 2.01-3.00 sec 25.4 MBytes 215 Mbits/sec
[ 5] 3.00-4.01 sec 26.5 MBytes 220 Mbits/sec
[ 5] 4.01-5.00 sec 26.2 MBytes 222 Mbits/sec
[ 5] 5.00-6.00 sec 26.9 MBytes 225 Mbits/sec
[ 5] 6.00-7.00 sec 27.0 MBytes 226 Mbits/sec
[ 5] 7.00-8.01 sec 26.9 MBytes 224 Mbits/sec
[ 5] 8.01-9.00 sec 26.5 MBytes 223 Mbits/sec
[ 5] 9.00-10.00 sec 26.8 MBytes 225 Mbits/sec
[ 5] 10.00-10.02 sec 640 KBytes 224 Mbits/sec
Signed-off-by: Markus Stockhausen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19960
Signed-off-by: Robert Marko <[email protected]>
Felix Fietkau [Fri, 5 Sep 2025 16:18:54 +0000 (18:18 +0200)]
Revert "kernel: improve mtk_eth_soc performance"
This reverts commit
3e6d5be3d938383507631a9f20905747fe9d728a, until
stability issues have been figured out.
Signed-off-by: Felix Fietkau <[email protected]>
Aleksander Jan Bajkowski [Sun, 31 Aug 2025 19:54:34 +0000 (21:54 +0200)]
kernel: add quirk for two SFP+ transceivers
Backport quirks for two SFP+ modules. Both support the RollBall protocol.
The fix for the FLYPRO module is queued in net-next tree.
Signed-off-by: Aleksander Jan Bajkowski <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19949
Signed-off-by: Hauke Mehrtens <[email protected]>
Markus Stockhausen [Sat, 30 Aug 2025 16:29:29 +0000 (12:29 -0400)]
realtek: drop obsolete kernel patches
These patches hacked the set_eee() and get_eee() functions into
the phy_driver. Drop them with no consumer left.
Signed-off-by: Markus Stockhausen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19906
Signed-off-by: Hauke Mehrtens <[email protected]>
Markus Stockhausen [Sat, 30 Aug 2025 16:12:34 +0000 (12:12 -0400)]
realtek: drop RTL8226/RTL8221B downstream PHY driver
Since we are using upstream PHY drivers there is no more need
for the downstream version. Side effect is that the SoC dependent
polling functions are no longer needed. This was always wrong
in this driver.
Signed-off-by: Markus Stockhausen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19906
Signed-off-by: Hauke Mehrtens <[email protected]>
Mieczyslaw Nalewaj [Sun, 31 Aug 2025 14:53:36 +0000 (16:53 +0200)]
kernel: update and move net bridge patch to backport folder
Update patch 642-net-bridge-locally-receive-all-multicast-packets-if-.patch to upstream version
and move to backport folder as 625-v6.16-net-bridge-locally-receive-all-multicast-packets-if-.patch
because kernel 6.16 already includes it.
Link: https://lore.kernel.org/all/OSZPR01MB8434308370ACAFA90A22980798B32@OSZPR01MB8434.jpnprd01.prod.outlook.com/
Link: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=a496d2f0fd612ab9e10700afe00dc9267bad788b
Signed-off-by: Mieczyslaw Nalewaj <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19875
Signed-off-by: Hauke Mehrtens <[email protected]>
Felix Fietkau [Thu, 4 Sep 2025 21:23:44 +0000 (23:23 +0200)]
Revert "mt76: update to Git HEAD (2025-09-04)"
This reverts commit
2eb42969a79162d29a1dc77ba8254ef1f769cb6b, due to reported
regression
Signed-off-by: Felix Fietkau <[email protected]>
Felix Fietkau [Thu, 4 Sep 2025 17:30:09 +0000 (19:30 +0200)]
mt76: update to Git HEAD (2025-09-04)
27ad37728c3f wifi: mt76: mt7996: Check phy before init msta_link in mt7996_mac_sta_add_links()
95c9b8099ede wifi: mt76: mt7996: Set EML capabilities for AP interface
08df8dd7b00b wifi: mt76: mt7996: Use proper link_id in link_sta_rc_update callback
15fa4e33ee8f wifi: mt76: mt7996: Enable MLO support for client interfaces
3400b1ba33be wifi: mt76: mt7925: add pci restore for hibernate
51a1c0a086c8 wifi: mt76: mt7921: Add 160MHz beamformee capability for mt7922 device
435e596914fa wifi: mt76: mt7996: Use proper link info in mt7996_mcu_add_group
d30faac3b645 firmware: update mt7996 and mt7992 firmware to
20250606
304226bc4552 wifi: mt76: mt7996: Fix mt7996_reverse_frag0_hdr_trans for MLO
7cf18f8ebbb8 wifi: mt76: mt7996: Add all active links to poll list in mt7996_mac_tx_free()
16090cb27d9f wifi: mt76: mt7996: Implement MLD address translation for EAPOL
a1c319500a53 wifi: mt76: mt7996: Temporarily disable EPCS
5f3ea4562fbf wifi: mt76: mt7921: Place upper limit on station AID
ef2468830f6d wifi: mt76: un-embedd netdev from mt76_dev
29bca0ca462b net: mediatek: wed: Introduce MT7992 WED support to MT7988 SoC
245f6ff460c8 wifi: mt76: Add reset_idx to reset_q mt76_queue_ops signature.
4a3a5a7d71a8 wifi: mt76: Remove q->ndesc check in mt76_dma_rx_fill()
d540538299f7 wifi: mt76: Differentiate between RRO data and RRO MSDU queues
d0217732f96e wifi: mt76: Do not always enable NAPIs for WED RRO queues
1df790839241 wifi: mt76: mt7996: Initial DMA configuration for MT7992 WED support
fca511f401e9 wifi: mt76: mt7996: Enable HW RRO for MT7992 chipset
8134055d3459 wifi: mt76: mt7996: Introduce the capability to reset MT7992 WED device
4f81d751b5de wifi: mt76: mt7996: Fix tx-queues initialization for second phy on mt7996
f559eef156fd wifi: mt76: mt7996: Fix RX packets configuration for primary WED device
6b518355fec6 wifi: mt76: mt7996: Enable WED for MT7992 chipset
13eb05fa4a43 wifi: mt76: mt7996: Introduce RRO MSDU callbacks
ac1bca49973b wifi: mt76: Add rx_queue_init callback
d82330a9d019 wifi: mt76: mt7996: Decouple RRO logic from WED support
0a32ae3cc23d wifi: mt76: Add mt76_dma_get_rxdmad_c_buf utility routione
6c902ccba889 wifi: mt76: mt7996: Add SW path for HW-RRO v3.1
Signed-off-by: Felix Fietkau <[email protected]>
Felix Fietkau [Mon, 14 Jul 2025 09:55:10 +0000 (11:55 +0200)]
kernel: improve mtk_eth_soc performance
- shrink data structures
- avoid unnecessary divisions
- support GSO fraglist on tx
Signed-off-by: Felix Fietkau <[email protected]>
Hauke Mehrtens [Wed, 3 Sep 2025 20:42:48 +0000 (22:42 +0200)]
mac80211: Fix compilation of iwlwifi driver
The Intel iwlwifi mld driver uses some updated thermal functions. Adapt
the driver to compile again kernel 6.6 again.
Fixes: 9c82d499995b ("mac80211: iwlwifi fix BE200 probe")
Link: https://github.com/openwrt/openwrt/pull/19948
Signed-off-by: Hauke Mehrtens <[email protected]>
Hauke Mehrtens [Wed, 3 Sep 2025 20:55:26 +0000 (22:55 +0200)]
mac80211: iwlwifi: Add DRIVER_11BE_SUPPORT
The driver support Wifi 7, add dependency to DRIVER_11BE_SUPPORT.
Link: https://github.com/openwrt/openwrt/pull/19948
Signed-off-by: Hauke Mehrtens <[email protected]>
Hauke Mehrtens [Wed, 3 Sep 2025 20:56:43 +0000 (22:56 +0200)]
mac80211: Refresh patches
Automatically Refresh the patches.
Fixes: 4d3a35f3689 ("mac80211: remove rt2x00_platform_data")
Link: https://github.com/openwrt/openwrt/pull/19948
Signed-off-by: Hauke Mehrtens <[email protected]>
Markus Stockhausen [Sat, 30 Aug 2025 17:01:06 +0000 (13:01 -0400)]
realtek: Rename ZyXEL XGS1210-12 to XGS1210-12 a1
A new version of the ZyXEL XGS1210-12 has been discovered in
the wild. It includes at least two known hardware changes
- lan9/lan10 use RTL8221B instead of RTL8226
- lan9/lan10 use different SMI busses
Pave the new device the way by splitting the existing DTS.
According to the vendor website the models are named
- A1 (first version): not explicetly labeled
- B1 (second version): Label Rev. B1 on device
Rename the current OpenWrt device definition to A1 as it was
made for the first version. To stay compatible with older
installations, add the old device name to the list of
supported devices.
Signed-off-by: Markus Stockhausen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19908
Signed-off-by: Hauke Mehrtens <[email protected]>
Markus Stockhausen [Fri, 22 Aug 2025 08:43:23 +0000 (04:43 -0400)]
realtek: rt-loader: add ROM uImage lookup (aka standalone)
The rt-loader currently only supports booting piggy backed lzma
compressed kernels. This requires a data layout where the kernel
directly follows the loader. That might not be sufficient for
more complex flash layouts.
Especially bootbase devices (like ZyXEL GS1920) will need some
kind of chain loading that needs to be explored yet.
Enhance the rt-loader as follows:
- Allow to build as standalone version
- In this case a flash start address is given
- During boot loader will search the ROM starting from that address
- If it finds a uImage this will be loaded into RAM
- Afterwards it will be decompressed to its load address
- While we are here add uncompressed uImage support
As always the implementation tries to be as simple as possible.
- uImage detection works without magics
- uImage will be loaded to highest possible memory address
- Documentation in Makefile has been adapted accordingly
Funny side fact: A standalone rt-loader can chain load a piggy
backed rt-loader from flash.
During bootup loader will show
rt-loader
Running on RTL8380M (chip id 6275C) with 256MB
Relocate 15760 bytes from 0x82000000 to 0x8ffa0000
Searching for uImage starting at 0xb45a0000 ...
uImage 'MIPS OpenWrt Linux-6.12.40' found at 0xb45a0000 with load address 0x80100000
Copy
2923034 bytes of image data to 0x8fcd61e6 ...
Extract image with
2923034 bytes from 0x8fcd61e6 to 0x80100000 ...
Final kernel size is
2923034 bytes
Booting kernel from 0x80100000 ...
Signed-off-by: Markus Stockhausen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19832
Signed-off-by: Hauke Mehrtens <[email protected]>
Markus Stockhausen [Fri, 22 Aug 2025 08:41:29 +0000 (04:41 -0400)]
realtek: rt-loader: memory library enhancements
Provide a crc32 function (will be needed later). Do some
minor naming and coding cleanups
Signed-off-by: Markus Stockhausen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19832
Signed-off-by: Hauke Mehrtens <[email protected]>
Tianling Shen [Mon, 1 Sep 2025 08:22:04 +0000 (16:22 +0800)]
uboot-rockchip: Update to 2025.07
Update to 2025.07.
Tested-by: FUKAUMI Naoki <[email protected]>
Signed-off-by: Tianling Shen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19923
Signed-off-by: Hauke Mehrtens <[email protected]>
Tianling Shen [Mon, 1 Sep 2025 08:14:09 +0000 (16:14 +0800)]
arm-trusted-firmware-rockchip: Update to 2.12.6
Bump GCC toolchain while at it.
Changelog: https://trustedfirmware-a.readthedocs.io/en/lts-v2.12.6/change-log.html#lts-2-12-6-2025-08-29
Tested-by: FUKAUMI Naoki <[email protected]>
Signed-off-by: Tianling Shen <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19923
Signed-off-by: Hauke Mehrtens <[email protected]>
David Bauer [Mon, 28 Jul 2025 01:01:37 +0000 (03:01 +0200)]
uqmi: update to latest HEAD
7914da4 uqmi: extend wda-get-data-format
7aef645 wda: add option for enabling flow-control
f74ddb3 wds: implement retrieval of profile list
6be8b6e wds: implement selection of LTE attach PDNs
21c4aaa wds: implement selection of default profile
5c844c0 wds: implement profile deletion
0756755 wds: reduce code duplication
283fbe0 data: add downlink padding option
4b90804 wda: allow agggregation parameter configuration
c20c017 uqmi: enable binding WDS sessions to QMAP multiplex
a1b37fe uqmi: fix whitespace errors
Signed-off-by: David Bauer <[email protected]>
Sven Eckelmann [Wed, 20 Aug 2025 03:19:31 +0000 (05:19 +0200)]
realtek: rtl931x: Fix unsafe MAC_L2_GLOBAL_CTRL2 access
Registers must not be accessed in parallel by multiple drivers.
Read-modify-write operations are not atomic, and the result of parallel
access is undefined.
The MAC_L2_GLOBAL_CTRL2 register is essentially a pin configuration
register and is represented by a pinmux node in the devicetree. Operations
on this register by the realtek,rtl838x-eth driver must therefore also be
reflected in the devicetree.
Since the MDIO sets used are board-specific, the pins must be enabled in
the board’s devicetree. This can be achieved using the pinctrl properties
for the realtek,rtl83xx-switch.
&switch0 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_enable_mdc_mdio_0>,
<&pinmux_enable_mdc_mdio_1>;
....
};
Signed-off-by: Sven Eckelmann <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19815
Signed-off-by: Robert Marko <[email protected]>
Sven Eckelmann [Wed, 20 Aug 2025 03:19:31 +0000 (05:19 +0200)]
realtek: rtl931x: Add LED Sync configuration
The pinmux-related registers on the RTL931X SoC family are spread across
various non-consecutive registers. It might be tempting to modify them
directly in a specific driver (SPI, LED, etc.), but this would cause issues
with parallel, non-locked read-modify-write operations, which are required
to update individual portions of these registers.
Instead, it is better to use the devicetree pinctrl properties to define
the correct configurations for the various operation modes.
One important setting here is the LED Sync bit. This allows the LED
controller to generate an additional positive edge on the `STCP`
("STore Clock Pin", also known as `RCLK`) of the LED shift register after
the actual content has already been shifted in using the normal shift
clock. The LED shift register is then expected to copy the content from the
shift register section into the storage registers, which act as the actual
LED output control. This functionality is available in, and commonly used
with, the SNx4HC595 family of shift registers.
To activate it, simply register it in the default state of the
"realtek,rtl83xx-switch" node:
&switch0 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_enable_led_sync>;
....
};
It would be nicer when this can be directly added to the led subnode. But
for this to work, `realtek,rtl9300-leds` must first be an actual driver
(known to the driver core).
[1] https://www.ti.com/lit/ds/symlink/sn74hc595.pdf
Suggested-by: Bevan Weiss <[email protected]>
Signed-off-by: Sven Eckelmann <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19815
Signed-off-by: Robert Marko <[email protected]>
Sven Eckelmann [Wed, 20 Aug 2025 03:37:37 +0000 (05:37 +0200)]
realtek: rtl931x: Readd MAC_L2_GLOBAL_CTRL2 pinmux
The MAC_L2_GLOBAL_CTRL2 register is primarily used for pin configuration.
It is necessary to select specific modes for pins or to free them for use
as GPIOs.
Fixes: 9dbc04785c4e ("realtek: add rtl8231-aux to rtl931x.dtsi")
Signed-off-by: Sven Eckelmann <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19815
Signed-off-by: Robert Marko <[email protected]>
Sven Eckelmann [Wed, 20 Aug 2025 03:19:31 +0000 (05:19 +0200)]
realtek: rtl930x: Define GPIO_SEL_CTRL pinmux node
The pinmux-related registers on the RTL930X SoC family are spread across
various non-consecutive registers. It might be tempting to modify them
directly in a specific driver (SPI, LED, etc.), but this would cause issues
with parallel, non-locked read-modify-write operations, which are required
to update individual portions of these registers.
Instead, it is better to use the devicetree pinctrl properties to define
the correct configurations for the various operation modes.
One important setting here is the LED Sync bit. This allows the LED
controller to generate an additional positive edge on the `STCP`
("STore Clock Pin", also known as `RCLK`) of the LED shift register after
the actual content has already been shifted in using the normal shift
clock. The LED shift register is then expected to copy the content from the
shift register section into the storage registers, which act as the actual
LED output control. This functionality is available in, and commonly used
with, the SNx4HC595 family of shift registers.
To activate it, simply register it in the default state of the
"realtek,rtl83xx-switch" node:
&switch0 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_enable_led_sync>;
....
};
It would be nicer when this can be directly added to the led subnode. But
for this to work, `realtek,rtl9300-leds` must first be an actual driver
(known to the driver core).
[1] https://www.ti.com/lit/ds/symlink/sn74hc595.pdf
Suggested-by: Bevan Weiss <[email protected]>
Signed-off-by: Sven Eckelmann <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19815
Signed-off-by: Robert Marko <[email protected]>
Janusz Dziedzic [Mon, 1 Sep 2025 17:54:00 +0000 (19:54 +0200)]
linux-firmware: intel: kick BE200 wifi firmware
Latest backports require newer firmware.
Signed-off-by: Janusz Dziedzic <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19927
Signed-off-by: Hauke Mehrtens <[email protected]>
Janusz Dziedzic [Mon, 1 Sep 2025 17:50:40 +0000 (19:50 +0200)]
mac80211: iwlwifi fix BE200 probe
Fix probing and load correct drivers
when using last backports.
Signed-off-by: Janusz Dziedzic <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19927
Signed-off-by: Hauke Mehrtens <[email protected]>
Christian Marangi [Mon, 1 Sep 2025 16:30:27 +0000 (18:30 +0200)]
airoha: add NPU and reserved memory node for AN7581
Add the NPU and reserved memory node for AN7581 dtsi since it's not
supported.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <[email protected]>
Christian Marangi [Mon, 1 Sep 2025 16:24:57 +0000 (18:24 +0200)]
airoha: major backport of Airoha Ethernet driver feature support
Major backport of upstream patch for support of multiple feature of the
Airoha Ethernet driver.
Feature backported are TSO, Jumbo packet, Offload and initial Wlan
Offload support.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <[email protected]>
Christian Marangi [Mon, 1 Sep 2025 16:23:58 +0000 (18:23 +0200)]
airoha: backport trivial fixes for pinctrl and ethernet driver
Backport trivial fixes from upstream related to pinctrl and ethernet
driver.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <[email protected]>
Christian Marangi [Mon, 1 Sep 2025 16:19:57 +0000 (18:19 +0200)]
airoha: backport patch adding support for AN7581 Ethernet PHY
Backport patch adding support for AN7581 Ethernet PHY based on the same
Mediatek embedded Switch PHY.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <[email protected]>
Christian Marangi [Mon, 1 Sep 2025 16:18:43 +0000 (18:18 +0200)]
generic: reintroduce Mediatek PHY patch to backport directory
Mediatek PHY patch has been merged upstream. Reintroduce them to
backport directory as the same PHY is also needed for Airoha target.
All the affected patch automatically refreshed.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <[email protected]>
Christian Marangi [Mon, 1 Sep 2025 16:03:35 +0000 (18:03 +0200)]
firmware: Add support for Airoha EN7581 NPU firmware
Add support for Airoha EN7581 NPU firmware present in linux-firmware.
Support for it is fully upstream with the Ethernet part fully pushed and
the Wireless Offload currently in progress for various WiFi chip.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <[email protected]>
Christian Marangi [Sat, 5 Jul 2025 11:01:21 +0000 (13:01 +0200)]
generic: backport support for Aeonsemi AS21xxx PHY
Backport support for Aeonsemi AS121xxx PHY. The PHY require dedicated
firmware to be loaded to correctly work and support a big family of
Aeonsemi PHY that provide from 1G to 10G speed.
Automatically refresh all affected patch and file (rtl PHY).
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <[email protected]>
Christian Marangi [Sat, 5 Jul 2025 10:51:49 +0000 (12:51 +0200)]
firmware: Add support for Aeonsemi AS21xxx firmware
Add support for Aeonsemi AS21xxx firmware blob. Firmware has been
submitted and accepted to linux-firmware. Current version is 1.8.2.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <[email protected]>
Christian Marangi [Sat, 5 Jul 2025 10:44:03 +0000 (12:44 +0200)]
airoha: replace thermal patch with upstream version
Replace thermal patch with upstream version. The thermal maintainer
reported that the sysfs entry are considered deprecated and that slope
and offset should be handled internally to the driver.
Link: https://github.com/openwrt/openwrt/pull/19816
Signed-off-by: Christian Marangi <[email protected]>
Jonas Jelonek [Tue, 2 Sep 2025 07:38:51 +0000 (09:38 +0200)]
realtek: fix model for TP-Link TL-ST1008F v2.0
Fix the model name in DTS compatible, Makefiles and board scripts by
using dash instead of comma or underscore. This aligns it with other
examples in OpenWrt and makes in consistent in all places where the
board model is used.
'tplink,tl-st1008f,v2' --> 'tplink,tl-st1008f-v2'
'tplink,tl-st1008f_v2' --> 'tplink,tl-st1008f-v2'
Fixes: 39b9b491bb ("realtek: add support for TP-Link TL-ST1008F v2.0")
Fixes: #19930
Signed-off-by: Jonas Jelonek <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19934
Signed-off-by: Hauke Mehrtens <[email protected]>
Hauke Mehrtens [Mon, 1 Sep 2025 21:11:02 +0000 (23:11 +0200)]
kernel: Fix kernel regression in local-broadcast routes
Backport a patch from upstream kernel 6.17-rc4 which fixes a regression
introduced in the latest stable kernel versions.
This is already in the Linus stable queues for the next minor kernel
updates.
Fixes: 1c92e468d544 ("kernel: bump 6.6 to 6.6.103")
Fixes: f39c7e103f9a ("kernel: bump 6.12 to 6.12.43")
Reported-by: Goetz Goerisch <[email protected]>
Signed-off-by: Hauke Mehrtens <[email protected]>
Oldřich Jedlička [Fri, 1 Aug 2025 20:38:10 +0000 (22:38 +0200)]
wifi-scripts: ucode: print unknown ssid as unknown
Currently it is printed as "null" (including quotes). Display it the same
as old iwinfo as unknown (no quotes).
Signed-off-by: Oldřich Jedlička <[email protected]>
Oldřich Jedlička [Mon, 1 Sep 2025 21:57:33 +0000 (23:57 +0200)]
wifi-scripts: ucode: fix dynamic_vlan value handling
The dynamic_vlan has values 0 (disabled), 1 (optional) and 2 (required).
Signed-off-by: Oldřich Jedlička <[email protected]>