drm/amdgpu: stop crashing on GDS/GWS/OA eviction

Simply ignore any copying here.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add GDS, GWS and OA debugfs files

Additional to the existing files for VRAM and GTT.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: fix parameter documentation for amdgpu_vm_free_pts

The function was modified without updating the documentation.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add amdgpu_vm_entries_mask v2

We can't get the mask for the root directory from the number of entries.

So add a new function to avoid that problem.

v2: fix typo in mask

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: Drop amdgpu_dm_prev_state struct

[Why]
It's not being used

[How]
Nuke it

Signed-off-by: Leo Li <[email protected]>
Reviewed-by: David Francis <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: Drop amdgpu_display_manager.dal member

[Why]
It's not being used anymore.

[How]
Nuke it

Signed-off-by: Leo Li <[email protected]>
Reviewed-by: David Francis <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: add query HPD interface.

[Why]
current dc_link_detect function is not only detection but also update some link data.

[How]
added a pure get HPD state function.

Signed-off-by: Chiawen Huang <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: dc 3.1.66

Signed-off-by: Tony Cheng <[email protected]>
Reviewed-by: Steven Chiu <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: add aux i2c event log.

[Why]
support i2c transition event log

[How]
refined aux REQ and REP events in aux flow.
commented REQ and REP events in i2c flow.

note: i2c event log is currently commented out. more work is required
to find an portocol parser to and generate event for the parser

Signed-off-by: Chiawen Huang <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: stop using switch for different CS revisions

Clock sources currently have support for asic specific
function pointers. But actual separation into functions
was never performed, leaving us with giant functions that
rely on switch.

This change creates separate functions, removing switch use.

Signed-off-by: Dmytro Laktyushkin <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: Fix 3D stereo issues.

We were not providing the correct pixel clocks to DML for marks
calculation.

Signed-off-by: Charlene Liu <[email protected]>
Reviewed-by: Dmytro Laktyushkin <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: revert "stop using gart_start as offset for the GTT domain"

Turned out the commit is incomplete and since we remove using the AGP
mapping from the GTT manager it is also not necessary any more.

This reverts commit 22d8bfafcc12dfa17b91d2e8ae4e1898e782003a.

Signed-off-by: Christian König <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Acked-by: James Zhu <[email protected]>
Tested-by: James Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: fix mask in GART location calculation

We need to mask the lower bits not the upper one.

Fixes: ec210e3226dc0 drm/amdgpu: put GART away from VRAM v2
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Acked-by: James Zhu <[email protected]>
Tested-by: James Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/display: return proper error codes in dm

Replace -1 with proper error codes.

Acked-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: simplify Raven, Raven2, and Picasso handling

Treat them all as Raven rather than adding a new picasso
asic type.  This simplifies a lot of code and also handles the
case of rv2 chips with the 0x15d8 pci id.  It also fixes dmcu
fw handling for picasso.

Acked-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/soc15: clean up picasso support

It's the same as raven so remove the duplicate case.

Acked-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Add DMCU to firmware query interface

DMCU firmware version can be read using the AMDGPU_INFO ioctl
or the amdgpu_firmware_info debugfs entry

Signed-off-by: David Francis <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: Add DMCU firmware version

Read the version number from the common firmware header and store
it in the dm struct

Signed-off-by: David Francis <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Style fixes to PRIME code documentation

* Use consistent capitalization in the description of function arguments
* Define and consistently use the BO acronym for buffer objects
* Some minor wording improvements

Signed-off-by: Vijetha Malkai <[email protected]>
[ Michel Dänzer: Made commit log more specific ]

Signed-off-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Initialize fences array entries in amdgpu_sa_bo_next_hole

The entries were only initialized once in amdgpu_sa_bo_new. If a fence
wasn't signalled yet in the first amdgpu_sa_bo_next_hole call, but then
got signalled before a later amdgpu_sa_bo_next_hole call, it could
destroy the fence but leave its pointer in the array, resulting in
use-after-free in amdgpu_sa_bo_new.

Reviewed-by: Christian König <[email protected]>
Signed-off-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: set CG flags for raven2 (v2)

Raven2 does not enable all of the CG flags that raven1 does.

v2: rebase (Alex)

Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Feifei Xu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/powerplay: disable raven2 force dpm level support (v2)

It's not supported yet.

v2: rebase (Alex)

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/powerplay: round up the Mhz convertion (v2)

Since the clock value there may be like 29999 10Khz.

v2: rebase (Alex)

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/powerplay: update smu10_verify_smc_interface() to be raven2 compatible

Check the raven2 version number as well.

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: Add DC config flag for Raven2 (v2)

Add DRM_AMD_DC_DCN1_01 config flag for Raven2

v2: Make DC select DRM_AMD_DC_DCN1_01 (Alex)

Signed-off-by: Bhawanpreet Lakha <[email protected]>
Reviewed-by: Harry Wentland <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Acked-by: Alex Deucher <[email protected]
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: Add Raven2 definitions in dc

Add Raven2 definitions in the dc code

Signed-off-by: Bhawanpreet Lakha <[email protected]>
Reviewed-by: Harry Wentland <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Acked-by: Alex Deucher <[email protected]
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: fix the VM fault while write at the top of the invisible vram

Raven2 has a HW issue that it is unable to use the vram which is out of
MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the workaround that increase system
aperture high address to get rid of the VM fault and hardware hang.

Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/gfx9: add raven2 golden setting

Golden register settings from the hw team.

Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/gfx9: add support for raven2 gfx firmware

use raven2 gfx firmware.

Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/sdma4: Add raven2 golden setting

Golden register settings from the hw team.

Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/sdma4: specify raven2 firmware.

use raven2 sdma firmware.

Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add psp support for raven2

Modified for using raven2_asd.bin to replace raven_asd.bin for raven2

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add raven2 vcn firmware support

Specify raven2 vcn firmware on amdgpu_vce_sw_init.

Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add raven2 to gpu_info firmware

Add gpu_info firmware for raven2.

Signed-off-by: Feifei Xu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: set external rev id for raven2

It's different from raven1.

Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Feifei Xu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: move get_rev_id at first before load gpu_info firmware

Rev id is used for identifying Raven2 series of chips. So we would better to
initialize it at first.

Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: use IP presence to free uvd and vce handles

Rather than checking the asic type, check whether the UVD
or VCE IP blocks exist.  This way we don't have to update
the check with new asics that use VCN.

Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: enable gfxoff in non-sriov and stutter mode by default

enable gfxoff in non-sriov and stutter mode by default

Signed-off-by: Kenneth Feng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add new raven series device

This patch is to add new pci device for raven series.

Signed-off-by: Huang Rui <[email protected]>
Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add ip blocks for picasso (v2)

Add PCO IPs.

V2: enable VCN as well

Signed-off-by: Huang Rui <[email protected]>
Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: enable vcn powergating for PCO

enable vcn pg

Signed-off-by: Kenneth Feng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: enable mmhub power gating

Remove some functions due to the design change.
All the mmhub power gating sequence is moved to
smu fw.Driver sends the message to enable mmhub
powergating.We can also skip the fw version check
since the old fw version is in a very early stage
and we don't use that fw for release.

Signed-off-by: Kenneth Feng <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Enable SDMA power gating for PCO

Enable SDMA power gating

Signed-off-by: Kenneth Feng <[email protected]>
Acked-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Add pg support for gfxoff for PCO

Add pg support for gfxoff.

Signed-off-by: Kenneth Feng <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add picasso for amdgpu kms

Add picasso for amdgpu kms

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add picasso support for sdma_v4

Add sdma support to picasso

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add picasso support for gfx_v9_0

Add gfx support to picasso

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add picasso support for gmc

Same as raven.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add clockgating support for picasso

Treat it the same as raven for now.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add picasso support for vcn

Add vcn support for picasso.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add picasso ucode loading method

Same as raven.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: initilize picasso psp firmwares support

Same as raven for now.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Add support of powerplay for picasso

add powerplay support for picasso, treat it the same as raven now.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display/dm: add picasso support

Add support for picasso to the display manager.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add picasso support for vm

Add vm support for picasso.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add soc15 support for picasso

Add the IP blocks, clock and powergating flags, and common clockgating support.

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add picasso to asic_type enum

Add picasso to amd_asic_type enum and amdgpu_asic_name[].

Signed-off-by: Likun Gao <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: use a single linked list for amdgpu_vm_bo_base

Instead of the double linked list. Gets the size of amdgpu_vm_pt down to
64 bytes again.

We could even reduce it down to 32 bytes, but that would require some
rather extreme hacks.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Chunming Zhou <[email protected]>
Acked-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: remove amdgpu_bo_list_entry.robj (v2)

We can get that just by casting tv.bo.

v2: squash in kfd fix (Alex)

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Chunming Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/ttm: once more fix ttm_bo_bulk_move_lru_tail

While cutting the lists we sometimes accidentally added a list_head from
the stack to the LRUs, effectively corrupting the list.

Remove the list cutting and use explicit list manipulation instead.

Signed-off-by: Christian König <[email protected]>
Reviewed-and-Tested: Huang Rui <[email protected]>
Tested-by: Mike Lothian <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: Fix pflip IRQ status after gpu reset.

Problem:
After GPU reset pflip completion IRQ is disabled and hence
any subsequent mode set or plane update leads to hang.

Fix:
Unless acrtc->otg_inst is initialized to -1 during display
block initializtion then durng resume from GPU reset
amdgpu_irq_gpu_reset_resume_helper will override CRTC 0 pflip
IRQ value with whatever value was on every other unused CRTC because
dm_irq_state will do irq_source = dal_irq_type + acrtc->otg_inst
where acrtc->otg_inst will be 0 for every unused CRTC.

Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: Andrey Grodzovsky <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: allow fragment processing for invalid PTEs

That should improve the PRT performance on Vega quite a bit.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Acked-by: Junwei Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: use the maximum possible fragment size on Vega/Raven

The fragment size controls only the L1 on Vega/Raven and we now don't
have any extra overhead any more because of larger fragments.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Acked-by: Junwei Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: meld together VM fragment and huge page handling

This optimizes the generating of PTEs by walking the hierarchy only once
for a range and making changes as necessary.

It allows for both huge (2MB) as well giant (1GB) pages to be used on
Vega and Raven.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Acked-by: Junwei Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: use leaf iterator for filling PTs

Less overhead and is the starting point for further cleanups and
improvements.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: use the DFS iterator in amdgpu_vm_invalidate_pds v2

Less code and easier to maintain.

v2: rename the function as well

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: use dfs iterator to free PDs/PTs

Allows us to free all PDs/PTs without recursion.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: use leaf iterator for allocating PD/PT

Less code and allows for easier error handling.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add some VM PD/PT iterators v2

Both a leaf as well as dfs iterator to walk over all the PDs/PTs.

v2: update comments and fix for_each_amdgpu_vm_pt_dfs_safe

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu:Add error message when register failed to reach expected value

Add error message when register failed to reach expected value, It will
help discover potential issue.

Signed-off-by: James Zhu <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/display: fix ptr_ret.cocci warnings

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c:771:1-3: WARNING: PTR_ERR_OR_ZERO can be used

 Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR

Generated by: scripts/coccinelle/api/ptr_ret.cocci

Fixes: e498eb713604 ("drm/amd/display: Add support for hw_state logging via debugfs")
CC: Nicholas Kazlauskas <[email protected]>
Signed-off-by: kbuild test robot <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd: Add DM DMCU support

DMCU (Display Microcontroller Unit) is a GPU chip involved in
eDP features like Adaptive Backlight Modulation and Panel Self
Refresh.

DC is already fully equipped to initialize DMCU as long as the
firmware is loaded.

At the moment only the raven firmware is available.

A single .bin file is loaded by the kernel's loading mechanism
and split into two ucodes according to the header.

DMCU is optional, so if the firmware is not found, no error or
warning is raised.

Signed-off-by: David Francis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd: Add PSP DMCU support

DMCU (Display Microcontroller Unit) is a GPU chip involved in
eDP features like Adaptive Backlight Modulation and Panel Self
Refresh.

PSP is already equipped to handle DMCU firmware loading, all
that is needed is to translate between the new DMCU ucode ID and
the equivalent psp_gfx_fw_type.

Signed-off-by: David Francis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd: Add ucode DMCU support

DMCU (Display Microcontroller Unit) is a GPU chip involved in
eDP features like Adaptive Backlight Modulation and Panel Self
Refresh.

DMCU has two pieces of firmware: the ERAM and the interrupt
vectors, which must be loaded seperately.

To this end, the DMCU firmware has a custom header and parsing
logic similar to MEC, to extract the two ucodes from a single
struct firmware.

Signed-off-by: David Francis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Move fault hash table to amdgpu vm

In stead of share one fault hash table per device, make it
per vm. This can avoid inter-process lock issue when fault
hash table is full.

Change-Id: I5d1281b7c41eddc8e26113e010516557588d3708
Signed-off-by: Oak Zeng <[email protected]>
Suggested-by: Christian Konig <[email protected]>
Suggested-by: Felix Kuehling <[email protected]>
Reviewed-by: Christian Konig <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: move cs dependencies front a bit

cs dependencies handling doesn't need in vm resv

Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: try allocating VRAM as power of two

Try to allocate VRAM in power of two sizes and only fallback to vram
split sizes if that fails.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Fix SDMA TO after GPU reset v3

After GPU reset amdgpu_vm_clear_bo triggers VM flush
but job->vm_pd_addr is not set causing SDMA TO.

v2:
Per advise by Christian König avoid flushing VM for jobs where
job->vm_pd_addr wasn't explicitly set.

v3:
Shortcut vm_flush_needed early.

Fixes cbd5285 drm/amdgpu: move setting the GART addr into TTM.
Signed-off-by: Andrey Grodzovsky <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add amdgpu_vm_update_func

Add helper to call the update function for both BO and shadow.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: add amdgpu_vm_pt_parent helper

Add a function to get the parent of a PD/PT.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Reviewed-by: Junwei Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: fix error handling in amdgpu_cs_user_fence_chunk

Slowly leaking memory one page at a time :)

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Andrey Grodzovsky <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdkfd: Only add bi-directional iolink on GPU with XGMI or largebar (v2)

v2: compile fix

Signed-off-by: shaoyunl <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdkfd: Generate xGMI direct iolink

Generate xGMI iolink for upper level usage

Signed-off-by: Shaoyun Liu <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdkfd: Add new iolink type defines

Update the iolink type defines according to the new thunk spec

Signed-off-by: Shaoyun Liu <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdkfd: kfd expose the hive_id of the device through its node properties

Thunk will generate the XGMI topology information when necessary with the hive_id
for each specified device

Signed-off-by: Shaoyun Liu <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: get_hive_id from amdgpu side (v2)

Retrieve hive_id from amdgpu device

v2: compile fix

Signed-off-by: Shaoyun Liu <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/include: Add get_hive_id interface in kfd2kgd

KFD need to get hive id from amdgpu to build up the XGMI topology

Signed-off-by: Shaoyun Liu <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu : Generate XGMI topology info from driver level

Driver will save an array of XGMI hive info, each hive will have a list of devices
that have the same hive ID.

Signed-off-by: Shaoyun Liu <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Add place holder functions for xgmi topology interface with psp

Add dummy function for xgmi function interface with psp

Signed-off-by: Shaoyun Liu <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu : Add psp function interfaces for XGMI support

Place holder for XGMI support

Signed-off-by: Shaoyun Liu <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu/gmc9: Adjust GART and AGP location with xgmi offset (v2)

On hives with xgmi enabled, the fb_location aperture is a size
which defines the total framebuffer size of all nodes in the
hive.  Each GPU in the hive has the same view via the fb_location
aperture.  GPU0 starts at offset (0 * segment size),
GPU1 starts at offset (1 * segment size), etc.

For access to local vram on each GPU, we need to take this offset into
account. This including on setting up GPUVM page table and GART table

v2: squash in "drm/amdgpu: Init correct fb region for none XGMI configuration"

Acked-by: Huang Rui <[email protected]>
Acked-by: Slava Abramov <[email protected]>
Signed-off-by: Shaoyun Liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Acked-by: Huang Rui <[email protected]>

drm/amdgpu/gmc9: add a new gfxhub 1.1 helper for xgmi

Used to populate the xgmi info on vega20.

v2: PF_MAX_REGION is val - 1 (Ray)

Acked-by: Huang Rui <[email protected]>
Acked-by: Slava Abramov <[email protected]>
Reviewed-by :Shaoyun liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by :Shaoyun liu <[email protected]>

drm/amdgpu/gmc: add initial xgmi structure to amdgpu_gmc structure

Initial pass at a structure to store xgmi info.  xgmi is a high
speed cross gpu interconnect.

Acked-by: Huang Rui <[email protected]>
Acked-by: Slava Abramov <[email protected]>
Reviewed-by :Shaoyun liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Signed-off-by: Shaoyun Liu <[email protected]>

drm/amd/include: update the bitfield define for PF_MAX_REGION

Correct the definition based on vega20 register spec

Signed-off-by: Shaoyun Liu <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: move PSP init prior to IH in gpu reset

since we use PSP to program IH regs now

Signed-off-by: Monk Liu <[email protected]>
Acked-by: Christian König <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Emily Deng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: set bulk_moveable to false when a per VM is released

Otherwise we might run into a use after free during bulk move.

Signed-off-by: Christian König <[email protected]>
Reviewed-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Fix SDMA hang in prt mode v2

Fix SDMA hang in prt mode, clear XNACK_WATERMARK in reg SDMA0_UTCL1_WATERMK to avoid the issue

Affected ASICs: VEGA10 VEGA12 RV1 RV2

v2: add reg clear for SDMA1

Signed-off-by: Tao Zhou <[email protected]>
Tested-by: Yukun Li <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amd/powerplay: fix compile warning for wrong data type V2

do_div expects the 1st argument in 64bit instead of 32bit.
Drop the usage of do_div as it seems unnecessary.

V2: drop usage of do_div completely

Signed-off-by: Evan Quan <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Fix warnings while make xmldocs

This patch fixes following warnings.

./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3011:
warning: Excess function parameter 'dev' description
in 'amdgpu_vm_get_task_info'

./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3012:
warning: Function parameter or member 'adev' not
described in 'amdgpu_vm_get_task_info'

./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3012:
warning: Excess function parameter 'dev' description
in 'amdgpu_vm_get_task_info'

Signed-off-by: Masanari Iida <[email protected]>
Signed-off-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

drm/amdgpu: Fix compute VM BO params after rebase v2

The intent of two commits was lost in the last rebase:

810955b drm/amdgpu: Fix acquiring VM on large-BAR systems
b5d21aa drm/amdgpu: Don't use shadow BO for compute context

This commit restores the original behaviour:
* Don't set AMDGPU_GEM_CREATE_NO_CPU_ACCESS for page directories
  to allow them to be reused for compute VMs
* Don't create shadow BOs for page tables in compute VMs

v2: move more logic into amdgpu_vm_bo_param

Signed-off-by: Felix Kuehling <[email protected]>
Tested-by: Kent Russell <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>