From: George Moussalem Date: Fri, 15 Aug 2025 05:30:40 +0000 (+0400) Subject: qualcommax: ipq50xx: backport upstreamed patch for adding ipq5018 tsens node X-Git-Url: http://git.openwrt.org/?a=commitdiff_plain;h=f11f4a35c91f8d7b60bf84acf482a75f02e2ec9a;p=openwrt%2Fstaging%2Fnbd.git qualcommax: ipq50xx: backport upstreamed patch for adding ipq5018 tsens node Use upstreamed patch for adding the tsens node. Temperature sensors are enabled by default, therefore remove explicit enablement in board files. Signed-off-by: George Moussalem Link: https://github.com/openwrt/openwrt/pull/19890 Signed-off-by: Robert Marko --- diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-ax6000.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-ax6000.dts index 1d2e4f0e85..93898d88e0 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-ax6000.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-ax6000.dts @@ -528,10 +528,6 @@ }; }; -&tsens { - status = "okay"; -}; - &pcie0_phy { status = "okay"; }; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-ax830.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-ax830.dts index 3eab174933..2853c84c46 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-ax830.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-ax830.dts @@ -385,10 +385,6 @@ }; }; -&tsens { - status = "okay"; -}; - &q6v5_wcss { status = "okay"; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-gl-b3000.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-gl-b3000.dts index 1e60ed8c97..30fce130bf 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-gl-b3000.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-gl-b3000.dts @@ -312,10 +312,6 @@ }; }; -&tsens { - status = "okay"; -}; - &q6v5_wcss { status = "okay"; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-mx-base.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-mx-base.dtsi index 0cc70cceb7..29754b1e03 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-mx-base.dtsi +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-mx-base.dtsi @@ -326,7 +326,3 @@ bias-disable; }; }; - -&tsens { - status = "okay"; -}; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-wn-dax3000gr.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-wn-dax3000gr.dts index 39df85f0b7..572f2fbcb2 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-wn-dax3000gr.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-wn-dax3000gr.dts @@ -396,10 +396,6 @@ }; }; -&tsens { - status = "okay"; -}; - &q6v5_wcss { status = "okay"; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-wrc-x3000gs2.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-wrc-x3000gs2.dts index fc3e86b870..3e01b8dbd1 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-wrc-x3000gs2.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq5018-wrc-x3000gs2.dts @@ -391,10 +391,6 @@ }; }; -&tsens { - status = "okay"; -}; - /* * ath11k Wi-Fi consumes too large memory spaces and too few spaces are * available for users. To prevent OOM when using LuCI or other softwares, diff --git a/target/linux/qualcommax/patches-6.12/0054-v6.18-arm64-dts-qcom-ipq5018-Add-tsens-node.patch b/target/linux/qualcommax/patches-6.12/0054-v6.18-arm64-dts-qcom-ipq5018-Add-tsens-node.patch new file mode 100644 index 0000000000..81e9302bd8 --- /dev/null +++ b/target/linux/qualcommax/patches-6.12/0054-v6.18-arm64-dts-qcom-ipq5018-Add-tsens-node.patch @@ -0,0 +1,240 @@ +From 450a80623e3b8bb5dae59e0d56046fc3d0a88f3b Mon Sep 17 00:00:00 2001 +From: Sricharan Ramabadhran +Date: Thu, 12 Jun 2025 10:46:14 +0400 +Subject: arm64: dts: qcom: ipq5018: Add tsens node + +IPQ5018 has tsens V1.0 IP with 5 sensors, though 4 are in use. +There is no RPM, so tsens has to be manually enabled. Adding the tsens +and nvmem nodes and adding 4 thermal sensors (zones). The critical trip +temperature is set to 120'C with an action to reboot. + +In addition, adding a cooling device to the CPU thermal zone which uses +CPU frequency scaling. + +Reviewed-by: Dmitry Baryshkov +Signed-off-by: Sricharan Ramabadhran +Signed-off-by: George Moussalem +Reviewed-by: Konrad Dybcio +[bjorn: Added tsens-v1 fallback compatible, per binding] +Link: https://lore.kernel.org/r/20250612-ipq5018-tsens-v13-2-a210f3683240@outlook.com +--- + arch/arm64/boot/dts/qcom/ipq5018.dtsi | 178 ++++++++++++++++++++++++++++++++++ + 1 file changed, 178 insertions(+) + +(limited to 'arch/arm64/boot/dts/qcom/ipq5018.dtsi') + +--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + + / { + interrupt-parent = <&intc>; +@@ -39,6 +40,7 @@ + next-level-cache = <&l2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + operating-points-v2 = <&cpu_opp_table>; ++ #cooling-cells = <2>; + }; + + cpu1: cpu@1 { +@@ -49,6 +51,7 @@ + next-level-cache = <&l2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + operating-points-v2 = <&cpu_opp_table>; ++ #cooling-cells = <2>; + }; + + l2_0: l2-cache { +@@ -182,6 +185,117 @@ + status = "disabled"; + }; + ++ qfprom: qfprom@a0000 { ++ compatible = "qcom,ipq5018-qfprom", "qcom,qfprom"; ++ reg = <0x000a0000 0x1000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ tsens_mode: mode@249 { ++ reg = <0x249 0x1>; ++ bits = <0 3>; ++ }; ++ ++ tsens_base1: base1@249 { ++ reg = <0x249 0x2>; ++ bits = <3 8>; ++ }; ++ ++ tsens_base2: base2@24a { ++ reg = <0x24a 0x2>; ++ bits = <3 8>; ++ }; ++ ++ tsens_s0_p1: s0-p1@24b { ++ reg = <0x24b 0x2>; ++ bits = <2 6>; ++ }; ++ ++ tsens_s0_p2: s0-p2@24c { ++ reg = <0x24c 0x1>; ++ bits = <1 6>; ++ }; ++ ++ tsens_s1_p1: s1-p1@24c { ++ reg = <0x24c 0x2>; ++ bits = <7 6>; ++ }; ++ ++ tsens_s1_p2: s1-p2@24d { ++ reg = <0x24d 0x2>; ++ bits = <5 6>; ++ }; ++ ++ tsens_s2_p1: s2-p1@24e { ++ reg = <0x24e 0x2>; ++ bits = <3 6>; ++ }; ++ ++ tsens_s2_p2: s2-p2@24f { ++ reg = <0x24f 0x1>; ++ bits = <1 6>; ++ }; ++ ++ tsens_s3_p1: s3-p1@24f { ++ reg = <0x24f 0x2>; ++ bits = <7 6>; ++ }; ++ ++ tsens_s3_p2: s3-p2@250 { ++ reg = <0x250 0x2>; ++ bits = <5 6>; ++ }; ++ ++ tsens_s4_p1: s4-p1@251 { ++ reg = <0x251 0x2>; ++ bits = <3 6>; ++ }; ++ ++ tsens_s4_p2: s4-p2@254 { ++ reg = <0x254 0x1>; ++ bits = <0 6>; ++ }; ++ }; ++ ++ tsens: thermal-sensor@4a9000 { ++ compatible = "qcom,ipq5018-tsens", "qcom,tsens-v1"; ++ reg = <0x004a9000 0x1000>, ++ <0x004a8000 0x1000>; ++ ++ nvmem-cells = <&tsens_mode>, ++ <&tsens_base1>, ++ <&tsens_base2>, ++ <&tsens_s0_p1>, ++ <&tsens_s0_p2>, ++ <&tsens_s1_p1>, ++ <&tsens_s1_p2>, ++ <&tsens_s2_p1>, ++ <&tsens_s2_p2>, ++ <&tsens_s3_p1>, ++ <&tsens_s3_p2>, ++ <&tsens_s4_p1>, ++ <&tsens_s4_p2>; ++ ++ nvmem-cell-names = "mode", ++ "base1", ++ "base2", ++ "s0_p1", ++ "s0_p2", ++ "s1_p1", ++ "s1_p2", ++ "s2_p1", ++ "s2_p2", ++ "s3_p1", ++ "s3_p2", ++ "s4_p1", ++ "s4_p2"; ++ ++ interrupts = ; ++ interrupt-names = "uplow"; ++ #qcom,sensors = <5>; ++ #thermal-sensor-cells = <1>; ++ }; ++ + tlmm: pinctrl@1000000 { + compatible = "qcom,ipq5018-tlmm"; + reg = <0x01000000 0x300000>; +@@ -630,6 +744,70 @@ + }; + }; + }; ++ ++ thermal-zones { ++ cpu-thermal { ++ thermal-sensors = <&tsens 2>; ++ ++ trips { ++ cpu-critical { ++ temperature = <120000>; ++ hysteresis = <1000>; ++ type = "critical"; ++ }; ++ ++ cpu_alert: cpu-passive { ++ temperature = <100000>; ++ hysteresis = <1000>; ++ type = "passive"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&cpu_alert>; ++ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, ++ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++ }; ++ ++ gephy-thermal { ++ thermal-sensors = <&tsens 4>; ++ ++ trips { ++ gephy-critical { ++ temperature = <120000>; ++ hysteresis = <1000>; ++ type = "critical"; ++ }; ++ }; ++ }; ++ ++ top-glue-thermal { ++ thermal-sensors = <&tsens 3>; ++ ++ trips { ++ top-glue-critical { ++ temperature = <120000>; ++ hysteresis = <1000>; ++ type = "critical"; ++ }; ++ }; ++ }; ++ ++ ubi32-thermal { ++ thermal-sensors = <&tsens 1>; ++ ++ trips { ++ ubi32-critical { ++ temperature = <120000>; ++ hysteresis = <1000>; ++ type = "critical"; ++ }; ++ }; ++ }; ++ }; + + timer { + compatible = "arm,armv8-timer"; diff --git a/target/linux/qualcommax/patches-6.12/0150-arm64-dts-qcom-ipq5018-Add-tsens-node.patch b/target/linux/qualcommax/patches-6.12/0150-arm64-dts-qcom-ipq5018-Add-tsens-node.patch deleted file mode 100644 index bed9a1dc00..0000000000 --- a/target/linux/qualcommax/patches-6.12/0150-arm64-dts-qcom-ipq5018-Add-tsens-node.patch +++ /dev/null @@ -1,203 +0,0 @@ -From: George Moussalem -Date: Fri, 28 Feb 2025 09:11:39 +0400 -Subject: [PATCH v9 6/6] arm64: dts: qcom: ipq5018: Add tsens node - -From: Sricharan Ramabadhran - -IPQ5018 has tsens V1.0 IP with 5 sensors, though 4 are in use. -There is no RPM, so tsens has to be manually enabled. Adding the tsens -and nvmem nodes and adding 4 thermal sensors (zones). With the -critical temperature being 120'C and action is to reboot. - -Reviewed-by: Dmitry Baryshkov -Signed-off-by: Sricharan Ramabadhran -Signed-off-by: George Moussalem ---- - arch/arm64/boot/dts/qcom/ipq5018.dtsi | 169 ++++++++++++++++++++++++++ - 1 file changed, 169 insertions(+) - ---- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -182,6 +182,117 @@ - status = "disabled"; - }; - -+ qfprom: qfprom@a0000 { -+ compatible = "qcom,ipq5018-qfprom", "qcom,qfprom"; -+ reg = <0x000a0000 0x1000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ tsens_mode: mode@249 { -+ reg = <0x249 0x1>; -+ bits = <0 3>; -+ }; -+ -+ tsens_base1: base1@249 { -+ reg = <0x249 0x2>; -+ bits = <3 8>; -+ }; -+ -+ tsens_base2: base2@24a { -+ reg = <0x24a 0x2>; -+ bits = <3 8>; -+ }; -+ -+ tsens_s0_p1: s0-p1@24b { -+ reg = <0x24b 0x2>; -+ bits = <2 6>; -+ }; -+ -+ tsens_s0_p2: s0-p2@24c { -+ reg = <0x24c 0x1>; -+ bits = <1 6>; -+ }; -+ -+ tsens_s1_p1: s1-p1@24c { -+ reg = <0x24c 0x2>; -+ bits = <7 6>; -+ }; -+ -+ tsens_s1_p2: s1-p2@24d { -+ reg = <0x24d 0x2>; -+ bits = <5 6>; -+ }; -+ -+ tsens_s2_p1: s2-p1@24e { -+ reg = <0x24e 0x2>; -+ bits = <3 6>; -+ }; -+ -+ tsens_s2_p2: s2-p2@24f { -+ reg = <0x24f 0x1>; -+ bits = <1 6>; -+ }; -+ -+ tsens_s3_p1: s3-p1@24f { -+ reg = <0x24f 0x2>; -+ bits = <7 6>; -+ }; -+ -+ tsens_s3_p2: s3-p2@250 { -+ reg = <0x250 0x2>; -+ bits = <5 6>; -+ }; -+ -+ tsens_s4_p1: s4-p1@251 { -+ reg = <0x251 0x2>; -+ bits = <3 6>; -+ }; -+ -+ tsens_s4_p2: s4-p2@254 { -+ reg = <0x254 0x1>; -+ bits = <0 6>; -+ }; -+ }; -+ -+ tsens: thermal-sensor@4a9000 { -+ compatible = "qcom,ipq5018-tsens"; -+ reg = <0x004a9000 0x1000>, /* TM */ -+ <0x004a8000 0x1000>; /* SROT */ -+ -+ nvmem-cells = <&tsens_mode>, -+ <&tsens_base1>, -+ <&tsens_base2>, -+ <&tsens_s0_p1>, -+ <&tsens_s0_p2>, -+ <&tsens_s1_p1>, -+ <&tsens_s1_p2>, -+ <&tsens_s2_p1>, -+ <&tsens_s2_p2>, -+ <&tsens_s3_p1>, -+ <&tsens_s3_p2>, -+ <&tsens_s4_p1>, -+ <&tsens_s4_p2>; -+ -+ nvmem-cell-names = "mode", -+ "base1", -+ "base2", -+ "s0_p1", -+ "s0_p2", -+ "s1_p1", -+ "s1_p2", -+ "s2_p1", -+ "s2_p2", -+ "s3_p1", -+ "s3_p2", -+ "s4_p1", -+ "s4_p2"; -+ -+ interrupts = ; -+ interrupt-names = "uplow"; -+ #qcom,sensors = <5>; -+ #thermal-sensor-cells = <1>; -+ }; -+ - tlmm: pinctrl@1000000 { - compatible = "qcom,ipq5018-tlmm"; - reg = <0x01000000 0x300000>; -@@ -630,6 +741,64 @@ - }; - }; - }; -+ -+ thermal-zones { -+ cpu-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&tsens 2>; -+ -+ trips { -+ cpu-critical { -+ temperature = <120000>; -+ hysteresis = <2>; -+ type = "critical"; -+ }; -+ }; -+ }; -+ -+ gephy-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&tsens 4>; -+ -+ trips { -+ gephy-critical { -+ temperature = <120000>; -+ hysteresis = <2>; -+ type = "critical"; -+ }; -+ }; -+ }; -+ -+ top-glue-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&tsens 3>; -+ -+ trips { -+ top_glue-critical { -+ temperature = <120000>; -+ hysteresis = <2>; -+ type = "critical"; -+ }; -+ }; -+ }; -+ -+ ubi32-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <0>; -+ thermal-sensors = <&tsens 1>; -+ -+ trips { -+ ubi32-critical { -+ temperature = <120000>; -+ hysteresis = <2>; -+ type = "critical"; -+ }; -+ }; -+ }; -+ }; - - timer { - compatible = "arm,armv8-timer"; diff --git a/target/linux/qualcommax/patches-6.12/0180-arm64-dts-qcom-ipq5018-Remove-tsens-v1-fallback-compatible.patch b/target/linux/qualcommax/patches-6.12/0180-arm64-dts-qcom-ipq5018-Remove-tsens-v1-fallback-compatible.patch new file mode 100644 index 0000000000..c4e5a1c234 --- /dev/null +++ b/target/linux/qualcommax/patches-6.12/0180-arm64-dts-qcom-ipq5018-Remove-tsens-v1-fallback-compatible.patch @@ -0,0 +1,109 @@ +From patchwork Mon Aug 18 11:33:47 2025 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: George Moussalem +X-Patchwork-Id: 14192807 +Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org + [10.30.226.201]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEFC62E22A9; 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Wysocki" , + Daniel Lezcano , Zhang Rui , + Lukasz Luba , Rob Herring , + Krzysztof Kozlowski , + Conor Dooley , + Sricharan Ramabadhran , + Bjorn Andersson , + Konrad Dybcio +Cc: linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, + devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + George Moussalem , + Dmitry Baryshkov , + Konrad Dybcio +X-Mailer: b4 0.14.2 +X-Developer-Signature: v=1; a=ed25519-sha256; t=1755516829; l=972; + i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; + bh=HJcOgtw7oiilIyh0aWOOzNZ2iln5P6lSb3GMC6Gave0=; + b=uR1EVwZAX79JKZzxxM9N7TA/hO1CtlDORhZ/FGhSsA68dLhwH953wdmIPFDj4vfeWpsTsB3Bh + 4W66WWUho9RBMALQ66he3JtRH90AzRDuzcypOj7GRnzE6ehzDO8Gl3R +X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; + pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= +X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 + with auth_id=364 +X-Original-From: George Moussalem +Reply-To: george.moussalem@outlook.com +From: George Moussalem + +From: George Moussalem + +Remove qcom,tsens-v1 as fallback compatible since this IP has no RPM +and, as such, must use its own init routine available in the driver. + +Reviewed-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Signed-off-by: George Moussalem +--- + arch/arm64/boot/dts/qcom/ipq5018.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi +@@ -340,7 +340,7 @@ + }; + + tsens: thermal-sensor@4a9000 { +- compatible = "qcom,ipq5018-tsens", "qcom,tsens-v1"; ++ compatible = "qcom,ipq5018-tsens"; + reg = <0x004a9000 0x1000>, + <0x004a8000 0x1000>; + diff --git a/target/linux/qualcommax/patches-6.12/0306-arm64-dts-qcom-ipq5018-Add-PWM-node.patch b/target/linux/qualcommax/patches-6.12/0306-arm64-dts-qcom-ipq5018-Add-PWM-node.patch index b97aa11ebc..b72f45ed3f 100644 --- a/target/linux/qualcommax/patches-6.12/0306-arm64-dts-qcom-ipq5018-Add-PWM-node.patch +++ b/target/linux/qualcommax/patches-6.12/0306-arm64-dts-qcom-ipq5018-Add-PWM-node.patch @@ -8,7 +8,7 @@ Signed-off-by: George Moussalem --- --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -338,6 +338,16 @@ +@@ -341,6 +341,16 @@ reg = <0x01937000 0x21000>; }; diff --git a/target/linux/qualcommax/patches-6.12/0324-arm64-dts-qcom-ipq5018-Add-crypto-nodes.patch b/target/linux/qualcommax/patches-6.12/0324-arm64-dts-qcom-ipq5018-Add-crypto-nodes.patch index 135624d97a..e20bde308d 100644 --- a/target/linux/qualcommax/patches-6.12/0324-arm64-dts-qcom-ipq5018-Add-crypto-nodes.patch +++ b/target/linux/qualcommax/patches-6.12/0324-arm64-dts-qcom-ipq5018-Add-crypto-nodes.patch @@ -8,7 +8,7 @@ Signed-off-by: George Moussalem --- --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -293,6 +293,30 @@ +@@ -296,6 +296,30 @@ #thermal-sensor-cells = <1>; }; diff --git a/target/linux/qualcommax/patches-6.12/0337-arm64-dts-qcom-ipq5018-Add-PRNG-node.patch b/target/linux/qualcommax/patches-6.12/0337-arm64-dts-qcom-ipq5018-Add-PRNG-node.patch index 23fb94e0e7..1343a61ea8 100644 --- a/target/linux/qualcommax/patches-6.12/0337-arm64-dts-qcom-ipq5018-Add-PRNG-node.patch +++ b/target/linux/qualcommax/patches-6.12/0337-arm64-dts-qcom-ipq5018-Add-PRNG-node.patch @@ -8,7 +8,7 @@ Signed-off-by: George Moussalem --- --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -254,6 +254,14 @@ +@@ -257,6 +257,14 @@ }; }; @@ -21,5 +21,5 @@ Signed-off-by: George Moussalem + }; + tsens: thermal-sensor@4a9000 { - compatible = "qcom,ipq5018-tsens"; - reg = <0x004a9000 0x1000>, /* TM */ + compatible = "qcom,ipq5018-tsens", "qcom,tsens-v1"; + reg = <0x004a9000 0x1000>, diff --git a/target/linux/qualcommax/patches-6.12/0339-arm64-dts-qcom-ipq5018-Add-QUP1-UART2-node.patch b/target/linux/qualcommax/patches-6.12/0339-arm64-dts-qcom-ipq5018-Add-QUP1-UART2-node.patch index c875690b58..de1df4579b 100644 --- a/target/linux/qualcommax/patches-6.12/0339-arm64-dts-qcom-ipq5018-Add-QUP1-UART2-node.patch +++ b/target/linux/qualcommax/patches-6.12/0339-arm64-dts-qcom-ipq5018-Add-QUP1-UART2-node.patch @@ -8,7 +8,7 @@ Signed-off-by: George Moussalem --- --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -417,6 +417,16 @@ +@@ -420,6 +420,16 @@ status = "disabled"; }; diff --git a/target/linux/qualcommax/patches-6.12/0340-arm64-dts-qcom-ipq5018-Add-QUP3-I2C-node.patch b/target/linux/qualcommax/patches-6.12/0340-arm64-dts-qcom-ipq5018-Add-QUP3-I2C-node.patch index 70ddcc7147..c8802806f5 100644 --- a/target/linux/qualcommax/patches-6.12/0340-arm64-dts-qcom-ipq5018-Add-QUP3-I2C-node.patch +++ b/target/linux/qualcommax/patches-6.12/0340-arm64-dts-qcom-ipq5018-Add-QUP3-I2C-node.patch @@ -8,7 +8,7 @@ Signed-off-by: George Moussalem --- --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -441,6 +441,21 @@ +@@ -444,6 +444,21 @@ status = "disabled"; }; diff --git a/target/linux/qualcommax/patches-6.12/0421-arm64-dts-qcom-ipq5018-Add-SPI-nand-node.patch b/target/linux/qualcommax/patches-6.12/0421-arm64-dts-qcom-ipq5018-Add-SPI-nand-node.patch index 516b46743b..cc6df41db5 100644 --- a/target/linux/qualcommax/patches-6.12/0421-arm64-dts-qcom-ipq5018-Add-SPI-nand-node.patch +++ b/target/linux/qualcommax/patches-6.12/0421-arm64-dts-qcom-ipq5018-Add-SPI-nand-node.patch @@ -13,7 +13,7 @@ Signed-off-by: George Moussalem --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -456,6 +456,36 @@ +@@ -459,6 +459,36 @@ status = "disabled"; }; diff --git a/target/linux/qualcommax/patches-6.12/0704-arm64-dts-qcom-ipq5018-Add-ethernet-cmn-node.patch b/target/linux/qualcommax/patches-6.12/0704-arm64-dts-qcom-ipq5018-Add-ethernet-cmn-node.patch index e528a9b86d..c831080baf 100644 --- a/target/linux/qualcommax/patches-6.12/0704-arm64-dts-qcom-ipq5018-Add-ethernet-cmn-node.patch +++ b/target/linux/qualcommax/patches-6.12/0704-arm64-dts-qcom-ipq5018-Add-ethernet-cmn-node.patch @@ -10,7 +10,7 @@ Signed-off-by: Ziyang Huang --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -16,6 +16,12 @@ +@@ -17,6 +17,12 @@ #size-cells = <2>; clocks { @@ -23,7 +23,7 @@ Signed-off-by: Ziyang Huang sleep_clk: sleep-clk { compatible = "fixed-clock"; #clock-cells = <0>; -@@ -182,6 +188,17 @@ +@@ -185,6 +191,17 @@ status = "disabled"; }; diff --git a/target/linux/qualcommax/patches-6.12/0713-arm64-dts-qcom-ipq5018-add-mdio-buses.patch b/target/linux/qualcommax/patches-6.12/0713-arm64-dts-qcom-ipq5018-add-mdio-buses.patch index d99f49ccad..81842e0dc5 100644 --- a/target/linux/qualcommax/patches-6.12/0713-arm64-dts-qcom-ipq5018-add-mdio-buses.patch +++ b/target/linux/qualcommax/patches-6.12/0713-arm64-dts-qcom-ipq5018-add-mdio-buses.patch @@ -22,7 +22,7 @@ Signed-off-by: George Moussalem --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -188,6 +188,30 @@ +@@ -191,6 +191,30 @@ status = "disabled"; }; diff --git a/target/linux/qualcommax/patches-6.12/0714-arm64-dts-qcom-ipq5018-add-ge-phy-to-internal-mdio-bus.patch b/target/linux/qualcommax/patches-6.12/0714-arm64-dts-qcom-ipq5018-add-ge-phy-to-internal-mdio-bus.patch index e3b1fa970d..987a84ca2e 100644 --- a/target/linux/qualcommax/patches-6.12/0714-arm64-dts-qcom-ipq5018-add-ge-phy-to-internal-mdio-bus.patch +++ b/target/linux/qualcommax/patches-6.12/0714-arm64-dts-qcom-ipq5018-add-ge-phy-to-internal-mdio-bus.patch @@ -26,7 +26,7 @@ Signed-off-by: George Moussalem --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -22,6 +22,18 @@ +@@ -23,6 +23,18 @@ #clock-cells = <0>; }; @@ -45,7 +45,7 @@ Signed-off-by: George Moussalem sleep_clk: sleep-clk { compatible = "fixed-clock"; #clock-cells = <0>; -@@ -190,7 +202,8 @@ +@@ -193,7 +205,8 @@ mdio0: mdio@88000 { compatible = "qcom,ipq5018-mdio"; @@ -55,7 +55,7 @@ Signed-off-by: George Moussalem #address-cells = <1>; #size-cells = <0>; -@@ -198,6 +211,13 @@ +@@ -201,6 +214,13 @@ clock-names = "gcc_mdio_ahb_clk"; status = "disabled"; @@ -69,7 +69,7 @@ Signed-off-by: George Moussalem }; mdio1: mdio@90000 { -@@ -392,8 +412,8 @@ +@@ -395,8 +415,8 @@ <&pcie0_phy>, <&pcie1_phy>, <0>, diff --git a/target/linux/qualcommax/patches-6.12/0715-arm64-dts-qcom-ipq5018-add-vendor-compatible-to-mdio-node.patch b/target/linux/qualcommax/patches-6.12/0715-arm64-dts-qcom-ipq5018-add-vendor-compatible-to-mdio-node.patch index e7dffa8910..fd22ba7e37 100644 --- a/target/linux/qualcommax/patches-6.12/0715-arm64-dts-qcom-ipq5018-add-vendor-compatible-to-mdio-node.patch +++ b/target/linux/qualcommax/patches-6.12/0715-arm64-dts-qcom-ipq5018-add-vendor-compatible-to-mdio-node.patch @@ -9,7 +9,7 @@ aren't upstreamed, add the vendor compatible. Signed-off-by: George Moussalem --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -201,7 +201,7 @@ +@@ -204,7 +204,7 @@ }; mdio0: mdio@88000 { diff --git a/target/linux/qualcommax/patches-6.12/0816-arm64-dts-qcom-ipq5018-add-wifi-support.patch b/target/linux/qualcommax/patches-6.12/0816-arm64-dts-qcom-ipq5018-add-wifi-support.patch index d158688928..f93bbaffc2 100644 --- a/target/linux/qualcommax/patches-6.12/0816-arm64-dts-qcom-ipq5018-add-wifi-support.patch +++ b/target/linux/qualcommax/patches-6.12/0816-arm64-dts-qcom-ipq5018-add-wifi-support.patch @@ -13,7 +13,7 @@ Signed-off-by: George Moussalem --- --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -697,6 +697,225 @@ +@@ -700,6 +700,225 @@ }; }; diff --git a/target/linux/qualcommax/patches-6.12/0817-arm64-dts-qcom-ipq5018-add-tz_apps-reserved-memory-region.patch b/target/linux/qualcommax/patches-6.12/0817-arm64-dts-qcom-ipq5018-add-tz_apps-reserved-memory-region.patch index e2e63837a9..dccf9adceb 100644 --- a/target/linux/qualcommax/patches-6.12/0817-arm64-dts-qcom-ipq5018-add-tz_apps-reserved-memory-region.patch +++ b/target/linux/qualcommax/patches-6.12/0817-arm64-dts-qcom-ipq5018-add-tz_apps-reserved-memory-region.patch @@ -8,7 +8,7 @@ Signed-off-by: George Moussalem --- --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -123,6 +123,11 @@ +@@ -126,6 +126,11 @@ #size-cells = <2>; ranges;