From: Stijn Segers <foss@volatilesystems.org>
Date: Thu, 4 Sep 2025 18:26:08 +0000 (+0200)
Subject: realtek: rtl838x: rename GS1900 series v1/v2 to A1/B1
X-Git-Url: http://git.openwrt.org/?a=commitdiff_plain;h=d205878ede886dd2e00b31e4f3c8444b16ae16be;p=openwrt%2Fstaging%2Fblocktrron.git

realtek: rtl838x: rename GS1900 series v1/v2 to A1/B1

Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the devices as such in OpenWrt to match the labels. Of note:
the first (A1) revision is never labeled as such on the label, just
in the web UI. Provide compatibles for seamless sysupgrade.

For a recent overview of Zyxel GS1900 series revisions, see the
table linked in https://forum.openwrt.org/t//57875/3874.

Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20118
Signed-off-by: Robert Marko <robimarko@gmail.com>
---

diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp-a1.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp-a1.dts
new file mode 100644
index 0000000000..a1634d2aae
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp-a1.dts
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-10hp-a1", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-10HP A1 Switch";
+
+	/* i2c of the left SFP cage: port 9 */
+	i2c0: i2c-gpio-0 {
+		compatible = "i2c-gpio";
+		sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sfp0: sfp-p9 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c0>;
+		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+		#thermal-sensor-cells = <0>;
+	};
+
+	/* i2c of the right SFP cage: port 10 */
+	i2c1: i2c-gpio-1 {
+		compatible = "i2c-gpio";
+		sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sfp1: sfp-p10 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c1>;
+		los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+		#thermal-sensor-cells = <0>;
+	};
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&mdio_bus0 {
+	INTERNAL_PHY_SDS(24, 4)
+	INTERNAL_PHY_SDS(26, 5)
+};
+
+&switch0 {
+	ports {
+		port@24 {
+			reg = <24>;
+			label = "lan9";
+			pcs-handle = <&serdes4>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
+			sfp = <&sfp0>;
+		};
+
+		port@26 {
+			reg = <26>;
+			label = "lan10";
+			pcs-handle = <&serdes5>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
+			sfp = <&sfp1>;
+		};
+	};
+};
+
+&thermal_zones {
+	sfp-thermal {
+		polling-delay-passive = <10000>;
+		polling-delay = <10000>;
+		thermal-sensors = <&sfp0>, <&sfp1>;
+		trips {
+			sfp-crit {
+				temperature = <110000>;
+				hysteresis = <1000>;
+				type = "critical";
+			};
+		};
+	};
+};
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
deleted file mode 100644
index 5b13df6ae7..0000000000
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
+++ /dev/null
@@ -1,95 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
-
-/ {
-	compatible = "zyxel,gs1900-10hp", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-10HP Switch";
-
-	/* i2c of the left SFP cage: port 9 */
-	i2c0: i2c-gpio-0 {
-		compatible = "i2c-gpio";
-		sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		i2c-gpio,delay-us = <2>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-	};
-
-	sfp0: sfp-p9 {
-		compatible = "sff,sfp";
-		i2c-bus = <&i2c0>;
-		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
-		tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
-		mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
-		tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
-		#thermal-sensor-cells = <0>;
-	};
-
-	/* i2c of the right SFP cage: port 10 */
-	i2c1: i2c-gpio-1 {
-		compatible = "i2c-gpio";
-		sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		i2c-gpio,delay-us = <2>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-	};
-
-	sfp1: sfp-p10 {
-		compatible = "sff,sfp";
-		i2c-bus = <&i2c1>;
-		los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
-		tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
-		mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
-		tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
-		#thermal-sensor-cells = <0>;
-	};
-};
-
-&uart1 {
-	status = "okay";
-};
-
-&mdio_bus0 {
-	INTERNAL_PHY_SDS(24, 4)
-	INTERNAL_PHY_SDS(26, 5)
-};
-
-&switch0 {
-	ports {
-		port@24 {
-			reg = <24>;
-			label = "lan9";
-			pcs-handle = <&serdes4>;
-			phy-mode = "1000base-x";
-			managed = "in-band-status";
-			sfp = <&sfp0>;
-		};
-
-		port@26 {
-			reg = <26>;
-			label = "lan10";
-			pcs-handle = <&serdes5>;
-			phy-mode = "1000base-x";
-			managed = "in-band-status";
-			sfp = <&sfp1>;
-		};
-	};
-};
-
-&thermal_zones {
-	sfp-thermal {
-		polling-delay-passive = <10000>;
-		polling-delay = <10000>;
-		thermal-sensors = <&sfp0>, <&sfp1>;
-		trips {
-			sfp-crit {
-				temperature = <110000>;
-				hysteresis = <1000>;
-				type = "critical";
-			};
-		};
-	};
-};
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-a1.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-a1.dts
new file mode 100644
index 0000000000..fd3d63e5d5
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-a1.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio_emulated.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-8-a1", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-8 A1 Switch";
+};
+
+&gpio1 {
+	/delete-node/ poe_enable;
+};
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-b1.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-b1.dts
new file mode 100644
index 0000000000..697d08547e
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-b1.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-8-b1", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-8 B1 Switch";
+};
+
+&gpio1 {
+	/delete-node/ poe_enable;
+};
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v1.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v1.dts
deleted file mode 100644
index 9838c023da..0000000000
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v1.dts
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio_emulated.dtsi"
-
-/ {
-	compatible = "zyxel,gs1900-8-v1", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-8 v1 Switch";
-};
-
-&gpio1 {
-	/delete-node/ poe_enable;
-};
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v2.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v2.dts
deleted file mode 100644
index 84f87ea037..0000000000
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8-v2.dts
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
-
-/ {
-	compatible = "zyxel,gs1900-8-v2", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-8 v2 Switch";
-};
-
-&gpio1 {
-	/delete-node/ poe_enable;
-};
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-a1.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-a1.dts
new file mode 100644
index 0000000000..172809e5cc
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-a1.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-8hp-a1", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-8HP A1 Switch";
+};
+
+&uart1 {
+	status = "okay";
+};
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-b1.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-b1.dts
new file mode 100644
index 0000000000..8ef021bbdf
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-b1.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-8hp-b1", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-8HP B1 Switch";
+};
+
+&uart1 {
+	status = "okay";
+};
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v1.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v1.dts
deleted file mode 100644
index 22c052f506..0000000000
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v1.dts
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
-
-/ {
-	compatible = "zyxel,gs1900-8hp-v1", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-8HP v1 Switch";
-};
-
-&uart1 {
-	status = "okay";
-};
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v2.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v2.dts
deleted file mode 100644
index 728342c22f..0000000000
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-8hp-v2.dts
+++ /dev/null
@@ -1,13 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
-
-/ {
-	compatible = "zyxel,gs1900-8hp-v2", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-8HP v2 Switch";
-};
-
-&uart1 {
-	status = "okay";
-};
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16-a1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16-a1.dts
new file mode 100644
index 0000000000..846ddce777
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16-a1.dts
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-16-a1", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-16 A1";
+};
+
+&mdio_bus0 {
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+};
+
+&switch0 {
+	ports {
+		SWITCH_PORT(16, 9, qsgmii)
+		SWITCH_PORT(17, 10, qsgmii)
+		SWITCH_PORT(18, 11, qsgmii)
+		SWITCH_PORT(19, 12, qsgmii)
+		SWITCH_PORT(20, 13, qsgmii)
+		SWITCH_PORT(21, 14, qsgmii)
+		SWITCH_PORT(22, 15, qsgmii)
+		SWITCH_PORT(23, 16, qsgmii)
+	};
+};
+
+&gpio1 {
+	/delete-node/ poe_enable;
+};
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts
deleted file mode 100644
index 5b38236031..0000000000
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-16.dts
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
-
-/ {
-	compatible = "zyxel,gs1900-16", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-16";
-};
-
-&mdio_bus0 {
-	EXTERNAL_PHY(16)
-	EXTERNAL_PHY(17)
-	EXTERNAL_PHY(18)
-	EXTERNAL_PHY(19)
-	EXTERNAL_PHY(20)
-	EXTERNAL_PHY(21)
-	EXTERNAL_PHY(22)
-	EXTERNAL_PHY(23)
-};
-
-&switch0 {
-	ports {
-		SWITCH_PORT(16, 9, qsgmii)
-		SWITCH_PORT(17, 10, qsgmii)
-		SWITCH_PORT(18, 11, qsgmii)
-		SWITCH_PORT(19, 12, qsgmii)
-		SWITCH_PORT(20, 13, qsgmii)
-		SWITCH_PORT(21, 14, qsgmii)
-		SWITCH_PORT(22, 15, qsgmii)
-		SWITCH_PORT(23, 16, qsgmii)
-	};
-};
-
-&gpio1 {
-	/delete-node/ poe_enable;
-};
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-a1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-a1.dts
new file mode 100644
index 0000000000..927d38f55c
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-a1.dts
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-24-a1", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-24 A1";
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	/* i2c of the left SFP cage: port 25 */
+	i2c0: i2c-gpio-0 {
+		compatible = "i2c-gpio";
+		sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sfp0: sfp-p25 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c0>;
+		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+	};
+
+	/* i2c of the right SFP cage: port 26 */
+	i2c1: i2c-gpio-1 {
+		compatible = "i2c-gpio";
+		sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sfp1: sfp-p26 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c1>;
+		los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+
+	INTERNAL_PHY_SDS(24, 4)
+	INTERNAL_PHY_SDS(26, 5)
+};
+
+&switch0 {
+	ports {
+		SWITCH_PORT(0, 1, qsgmii)
+		SWITCH_PORT(1, 2, qsgmii)
+		SWITCH_PORT(2, 3, qsgmii)
+		SWITCH_PORT(3, 4, qsgmii)
+		SWITCH_PORT(4, 5, qsgmii)
+		SWITCH_PORT(5, 6, qsgmii)
+		SWITCH_PORT(6, 7, qsgmii)
+		SWITCH_PORT(7, 8, qsgmii)
+
+		SWITCH_PORT(8, 9, internal)
+		SWITCH_PORT(9, 10, internal)
+		SWITCH_PORT(10, 11, internal)
+		SWITCH_PORT(11, 12, internal)
+		SWITCH_PORT(12, 13, internal)
+		SWITCH_PORT(13, 14, internal)
+		SWITCH_PORT(14, 15, internal)
+		SWITCH_PORT(15, 16, internal)
+
+		SWITCH_PORT(16, 17, qsgmii)
+		SWITCH_PORT(17, 18, qsgmii)
+		SWITCH_PORT(18, 19, qsgmii)
+		SWITCH_PORT(19, 20, qsgmii)
+		SWITCH_PORT(20, 21, qsgmii)
+		SWITCH_PORT(21, 22, qsgmii)
+		SWITCH_PORT(22, 23, qsgmii)
+		SWITCH_PORT(23, 24, qsgmii)
+
+		port@24 {
+			reg = <24>;
+			label = "lan25";
+			pcs-handle = <&serdes4>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
+			sfp = <&sfp0>;
+		};
+
+		port@26 {
+			reg = <26>;
+			label = "lan26";
+			pcs-handle = <&serdes5>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
+			sfp = <&sfp1>;
+		};
+	};
+};
+
+&gpio1 {
+	/delete-node/ poe_enable;
+};
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts
deleted file mode 100644
index 6f6ae25f88..0000000000
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-v1.dts
+++ /dev/null
@@ -1,131 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
-
-/ {
-	compatible = "zyxel,gs1900-24-v1", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-24 v1";
-
-	memory@0 {
-		reg = <0x0 0x4000000>;
-	};
-
-	/* i2c of the left SFP cage: port 25 */
-	i2c0: i2c-gpio-0 {
-		compatible = "i2c-gpio";
-		sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		i2c-gpio,delay-us = <2>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-	};
-
-	sfp0: sfp-p25 {
-		compatible = "sff,sfp";
-		i2c-bus = <&i2c0>;
-		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
-		tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
-		mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
-		tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
-	};
-
-	/* i2c of the right SFP cage: port 26 */
-	i2c1: i2c-gpio-1 {
-		compatible = "i2c-gpio";
-		sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		i2c-gpio,delay-us = <2>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-	};
-
-	sfp1: sfp-p26 {
-		compatible = "sff,sfp";
-		i2c-bus = <&i2c1>;
-		los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
-		tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
-		mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
-		tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
-	};
-};
-
-&uart1 {
-	status = "okay";
-};
-
-&mdio_bus0 {
-	EXTERNAL_PHY(0)
-	EXTERNAL_PHY(1)
-	EXTERNAL_PHY(2)
-	EXTERNAL_PHY(3)
-	EXTERNAL_PHY(4)
-	EXTERNAL_PHY(5)
-	EXTERNAL_PHY(6)
-	EXTERNAL_PHY(7)
-
-	EXTERNAL_PHY(16)
-	EXTERNAL_PHY(17)
-	EXTERNAL_PHY(18)
-	EXTERNAL_PHY(19)
-	EXTERNAL_PHY(20)
-	EXTERNAL_PHY(21)
-	EXTERNAL_PHY(22)
-	EXTERNAL_PHY(23)
-
-	INTERNAL_PHY_SDS(24, 4)
-	INTERNAL_PHY_SDS(26, 5)
-};
-
-&switch0 {
-	ports {
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
-
-		SWITCH_PORT(8, 9, internal)
-		SWITCH_PORT(9, 10, internal)
-		SWITCH_PORT(10, 11, internal)
-		SWITCH_PORT(11, 12, internal)
-		SWITCH_PORT(12, 13, internal)
-		SWITCH_PORT(13, 14, internal)
-		SWITCH_PORT(14, 15, internal)
-		SWITCH_PORT(15, 16, internal)
-
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
-
-		port@24 {
-			reg = <24>;
-			label = "lan25";
-			pcs-handle = <&serdes4>;
-			phy-mode = "1000base-x";
-			managed = "in-band-status";
-			sfp = <&sfp0>;
-		};
-
-		port@26 {
-			reg = <26>;
-			label = "lan26";
-			pcs-handle = <&serdes5>;
-			phy-mode = "1000base-x";
-			managed = "in-band-status";
-			sfp = <&sfp1>;
-		};
-	};
-};
-
-&gpio1 {
-	/delete-node/ poe_enable;
-};
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e-a1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e-a1.dts
new file mode 100644
index 0000000000..1f2a565d81
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e-a1.dts
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-24e-a1", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-24E A1";
+};
+
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+};
+
+&switch0 {
+	ports {
+		SWITCH_PORT(1, 1, qsgmii)
+		SWITCH_PORT(0, 2, qsgmii)
+		SWITCH_PORT(3, 3, qsgmii)
+		SWITCH_PORT(2, 4, qsgmii)
+		SWITCH_PORT(5, 5, qsgmii)
+		SWITCH_PORT(4, 6, qsgmii)
+		SWITCH_PORT(7, 7, qsgmii)
+		SWITCH_PORT(6, 8, qsgmii)
+
+		SWITCH_PORT(9, 9, internal)
+		SWITCH_PORT(8, 10, internal)
+		SWITCH_PORT(11, 11, internal)
+		SWITCH_PORT(10, 12, internal)
+		SWITCH_PORT(13, 13, internal)
+		SWITCH_PORT(12, 14, internal)
+		SWITCH_PORT(15, 15, internal)
+		SWITCH_PORT(14, 16, internal)
+
+		SWITCH_PORT(17, 17, qsgmii)
+		SWITCH_PORT(16, 18, qsgmii)
+		SWITCH_PORT(19, 19, qsgmii)
+		SWITCH_PORT(18, 20, qsgmii)
+		SWITCH_PORT(21, 21, qsgmii)
+		SWITCH_PORT(20, 22, qsgmii)
+		SWITCH_PORT(23, 23, qsgmii)
+		SWITCH_PORT(22, 24, qsgmii)
+	};
+};
+
+&gpio1 {
+	/delete-node/ poe_enable;
+};
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts
deleted file mode 100644
index e16e3b96e4..0000000000
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24e.dts
+++ /dev/null
@@ -1,64 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
-
-/ {
-	compatible = "zyxel,gs1900-24e", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-24E";
-};
-
-&mdio_bus0 {
-	EXTERNAL_PHY(0)
-	EXTERNAL_PHY(1)
-	EXTERNAL_PHY(2)
-	EXTERNAL_PHY(3)
-	EXTERNAL_PHY(4)
-	EXTERNAL_PHY(5)
-	EXTERNAL_PHY(6)
-	EXTERNAL_PHY(7)
-
-	EXTERNAL_PHY(16)
-	EXTERNAL_PHY(17)
-	EXTERNAL_PHY(18)
-	EXTERNAL_PHY(19)
-	EXTERNAL_PHY(20)
-	EXTERNAL_PHY(21)
-	EXTERNAL_PHY(22)
-	EXTERNAL_PHY(23)
-};
-
-&switch0 {
-	ports {
-		SWITCH_PORT(1, 1, qsgmii)
-		SWITCH_PORT(0, 2, qsgmii)
-		SWITCH_PORT(3, 3, qsgmii)
-		SWITCH_PORT(2, 4, qsgmii)
-		SWITCH_PORT(5, 5, qsgmii)
-		SWITCH_PORT(4, 6, qsgmii)
-		SWITCH_PORT(7, 7, qsgmii)
-		SWITCH_PORT(6, 8, qsgmii)
-
-		SWITCH_PORT(9, 9, internal)
-		SWITCH_PORT(8, 10, internal)
-		SWITCH_PORT(11, 11, internal)
-		SWITCH_PORT(10, 12, internal)
-		SWITCH_PORT(13, 13, internal)
-		SWITCH_PORT(12, 14, internal)
-		SWITCH_PORT(15, 15, internal)
-		SWITCH_PORT(14, 16, internal)
-
-		SWITCH_PORT(17, 17, qsgmii)
-		SWITCH_PORT(16, 18, qsgmii)
-		SWITCH_PORT(19, 19, qsgmii)
-		SWITCH_PORT(18, 20, qsgmii)
-		SWITCH_PORT(21, 21, qsgmii)
-		SWITCH_PORT(20, 22, qsgmii)
-		SWITCH_PORT(23, 23, qsgmii)
-		SWITCH_PORT(22, 24, qsgmii)
-	};
-};
-
-&gpio1 {
-	/delete-node/ poe_enable;
-};
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep-a1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep-a1.dts
new file mode 100644
index 0000000000..b4d07dd2d5
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep-a1.dts
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-24ep-a1", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-24EP A1 Switch";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+};
+
+&switch0 {
+	ports {
+		SWITCH_PORT(0, 1, qsgmii)
+		SWITCH_PORT(1, 2, qsgmii)
+		SWITCH_PORT(2, 3, qsgmii)
+		SWITCH_PORT(3, 4, qsgmii)
+		SWITCH_PORT(4, 5, qsgmii)
+		SWITCH_PORT(5, 6, qsgmii)
+		SWITCH_PORT(6, 7, qsgmii)
+		SWITCH_PORT(7, 8, qsgmii)
+
+		SWITCH_PORT(8, 9, internal)
+		SWITCH_PORT(9, 10, internal)
+		SWITCH_PORT(10, 11, internal)
+		SWITCH_PORT(11, 12, internal)
+		SWITCH_PORT(12, 13, internal)
+		SWITCH_PORT(13, 14, internal)
+		SWITCH_PORT(14, 15, internal)
+		SWITCH_PORT(15, 16, internal)
+
+		SWITCH_PORT(16, 17, qsgmii)
+		SWITCH_PORT(17, 18, qsgmii)
+		SWITCH_PORT(18, 19, qsgmii)
+		SWITCH_PORT(19, 20, qsgmii)
+		SWITCH_PORT(20, 21, qsgmii)
+		SWITCH_PORT(21, 22, qsgmii)
+		SWITCH_PORT(22, 23, qsgmii)
+		SWITCH_PORT(23, 24, qsgmii)
+	};
+};
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep.dts
deleted file mode 100644
index 7460068d27..0000000000
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24ep.dts
+++ /dev/null
@@ -1,64 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
-
-/ {
-	compatible = "zyxel,gs1900-24ep", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-24EP Switch";
-};
-
-&uart1 {
-	status = "okay";
-};
-
-&mdio_bus0 {
-	EXTERNAL_PHY(0)
-	EXTERNAL_PHY(1)
-	EXTERNAL_PHY(2)
-	EXTERNAL_PHY(3)
-	EXTERNAL_PHY(4)
-	EXTERNAL_PHY(5)
-	EXTERNAL_PHY(6)
-	EXTERNAL_PHY(7)
-
-	EXTERNAL_PHY(16)
-	EXTERNAL_PHY(17)
-	EXTERNAL_PHY(18)
-	EXTERNAL_PHY(19)
-	EXTERNAL_PHY(20)
-	EXTERNAL_PHY(21)
-	EXTERNAL_PHY(22)
-	EXTERNAL_PHY(23)
-};
-
-&switch0 {
-	ports {
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
-
-		SWITCH_PORT(8, 9, internal)
-		SWITCH_PORT(9, 10, internal)
-		SWITCH_PORT(10, 11, internal)
-		SWITCH_PORT(11, 12, internal)
-		SWITCH_PORT(12, 13, internal)
-		SWITCH_PORT(13, 14, internal)
-		SWITCH_PORT(14, 15, internal)
-		SWITCH_PORT(15, 16, internal)
-
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
-	};
-};
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-a1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-a1.dts
new file mode 100644
index 0000000000..dc7a474408
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-a1.dts
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-24hp-a1", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-24HP A1";
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	/* i2c of the left SFP cage: port 25 */
+	i2c0: i2c-gpio-0 {
+		compatible = "i2c-gpio";
+		sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sfp0: sfp-p25 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c0>;
+		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+	};
+
+	/* i2c of the right SFP cage: port 26 */
+	i2c1: i2c-gpio-1 {
+		compatible = "i2c-gpio";
+		sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sfp1: sfp-p26 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c1>;
+		los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+
+	INTERNAL_PHY_SDS(24, 4)
+	INTERNAL_PHY_SDS(26, 5)
+};
+
+&switch0 {
+	ports {
+		SWITCH_PORT(0, 1, qsgmii)
+		SWITCH_PORT(1, 2, qsgmii)
+		SWITCH_PORT(2, 3, qsgmii)
+		SWITCH_PORT(3, 4, qsgmii)
+		SWITCH_PORT(4, 5, qsgmii)
+		SWITCH_PORT(5, 6, qsgmii)
+		SWITCH_PORT(6, 7, qsgmii)
+		SWITCH_PORT(7, 8, qsgmii)
+
+		SWITCH_PORT(8, 9, internal)
+		SWITCH_PORT(9, 10, internal)
+		SWITCH_PORT(10, 11, internal)
+		SWITCH_PORT(11, 12, internal)
+		SWITCH_PORT(12, 13, internal)
+		SWITCH_PORT(13, 14, internal)
+		SWITCH_PORT(14, 15, internal)
+		SWITCH_PORT(15, 16, internal)
+
+		SWITCH_PORT(16, 17, qsgmii)
+		SWITCH_PORT(17, 18, qsgmii)
+		SWITCH_PORT(18, 19, qsgmii)
+		SWITCH_PORT(19, 20, qsgmii)
+		SWITCH_PORT(20, 21, qsgmii)
+		SWITCH_PORT(21, 22, qsgmii)
+		SWITCH_PORT(22, 23, qsgmii)
+		SWITCH_PORT(23, 24, qsgmii)
+
+		port@24 {
+			reg = <24>;
+			label = "lan25";
+			pcs-handle = <&serdes4>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
+			sfp = <&sfp0>;
+		};
+
+		port@26 {
+			reg = <26>;
+			label = "lan26";
+			pcs-handle = <&serdes5>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
+			sfp = <&sfp1>;
+		};
+	};
+};
+
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-b1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-b1.dts
new file mode 100644
index 0000000000..f6bd8447ac
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-b1.dts
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+
+/ {
+	compatible = "zyxel,gs1900-24hp-b1", "realtek,rtl838x-soc";
+	model = "Zyxel GS1900-24HP B1 Switch";
+
+	/* i2c of the left SFP cage: port 25 */
+	i2c0: i2c-gpio-0 {
+		compatible = "i2c-gpio";
+		sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sfp0: sfp-p25 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c0>;
+		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+	};
+
+	/* i2c of the right SFP cage: port 26 */
+	i2c1: i2c-gpio-1 {
+		compatible = "i2c-gpio";
+		sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+		i2c-gpio,delay-us = <2>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	sfp1: sfp-p26 {
+		compatible = "sff,sfp";
+		i2c-bus = <&i2c1>;
+		los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&mdio_bus0 {
+	EXTERNAL_PHY(0)
+	EXTERNAL_PHY(1)
+	EXTERNAL_PHY(2)
+	EXTERNAL_PHY(3)
+	EXTERNAL_PHY(4)
+	EXTERNAL_PHY(5)
+	EXTERNAL_PHY(6)
+	EXTERNAL_PHY(7)
+
+	EXTERNAL_PHY(16)
+	EXTERNAL_PHY(17)
+	EXTERNAL_PHY(18)
+	EXTERNAL_PHY(19)
+	EXTERNAL_PHY(20)
+	EXTERNAL_PHY(21)
+	EXTERNAL_PHY(22)
+	EXTERNAL_PHY(23)
+
+	INTERNAL_PHY_SDS(24, 4)
+	INTERNAL_PHY_SDS(26, 5)
+};
+
+&switch0 {
+	ports {
+		SWITCH_PORT(0, 1, qsgmii)
+		SWITCH_PORT(1, 2, qsgmii)
+		SWITCH_PORT(2, 3, qsgmii)
+		SWITCH_PORT(3, 4, qsgmii)
+		SWITCH_PORT(4, 5, qsgmii)
+		SWITCH_PORT(5, 6, qsgmii)
+		SWITCH_PORT(6, 7, qsgmii)
+		SWITCH_PORT(7, 8, qsgmii)
+
+		SWITCH_PORT(8, 9, internal)
+		SWITCH_PORT(9, 10, internal)
+		SWITCH_PORT(10, 11, internal)
+		SWITCH_PORT(11, 12, internal)
+		SWITCH_PORT(12, 13, internal)
+		SWITCH_PORT(13, 14, internal)
+		SWITCH_PORT(14, 15, internal)
+		SWITCH_PORT(15, 16, internal)
+
+		SWITCH_PORT(16, 17, qsgmii)
+		SWITCH_PORT(17, 18, qsgmii)
+		SWITCH_PORT(18, 19, qsgmii)
+		SWITCH_PORT(19, 20, qsgmii)
+		SWITCH_PORT(20, 21, qsgmii)
+		SWITCH_PORT(21, 22, qsgmii)
+		SWITCH_PORT(22, 23, qsgmii)
+		SWITCH_PORT(23, 24, qsgmii)
+
+
+		port@24 {
+			reg = <24>;
+			label = "lan25";
+			pcs-handle = <&serdes4>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
+			sfp = <&sfp0>;
+		};
+
+		port@26 {
+			reg = <26>;
+			label = "lan26";
+			pcs-handle = <&serdes5>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
+			sfp = <&sfp1>;
+		};
+	};
+};
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts
deleted file mode 100644
index 76e619c5a1..0000000000
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v1.dts
+++ /dev/null
@@ -1,128 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
-
-/ {
-	compatible = "zyxel,gs1900-24hp-v1", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-24HP v1";
-
-	memory@0 {
-		reg = <0x0 0x4000000>;
-	};
-
-	/* i2c of the left SFP cage: port 25 */
-	i2c0: i2c-gpio-0 {
-		compatible = "i2c-gpio";
-		sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		i2c-gpio,delay-us = <2>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-	};
-
-	sfp0: sfp-p25 {
-		compatible = "sff,sfp";
-		i2c-bus = <&i2c0>;
-		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
-		tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
-		mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
-		tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
-	};
-
-	/* i2c of the right SFP cage: port 26 */
-	i2c1: i2c-gpio-1 {
-		compatible = "i2c-gpio";
-		sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		i2c-gpio,delay-us = <2>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-	};
-
-	sfp1: sfp-p26 {
-		compatible = "sff,sfp";
-		i2c-bus = <&i2c1>;
-		los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
-		tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
-		mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
-		tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
-	};
-};
-
-&uart1 {
-	status = "okay";
-};
-
-&mdio_bus0 {
-	EXTERNAL_PHY(0)
-	EXTERNAL_PHY(1)
-	EXTERNAL_PHY(2)
-	EXTERNAL_PHY(3)
-	EXTERNAL_PHY(4)
-	EXTERNAL_PHY(5)
-	EXTERNAL_PHY(6)
-	EXTERNAL_PHY(7)
-
-	EXTERNAL_PHY(16)
-	EXTERNAL_PHY(17)
-	EXTERNAL_PHY(18)
-	EXTERNAL_PHY(19)
-	EXTERNAL_PHY(20)
-	EXTERNAL_PHY(21)
-	EXTERNAL_PHY(22)
-	EXTERNAL_PHY(23)
-
-	INTERNAL_PHY_SDS(24, 4)
-	INTERNAL_PHY_SDS(26, 5)
-};
-
-&switch0 {
-	ports {
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
-
-		SWITCH_PORT(8, 9, internal)
-		SWITCH_PORT(9, 10, internal)
-		SWITCH_PORT(10, 11, internal)
-		SWITCH_PORT(11, 12, internal)
-		SWITCH_PORT(12, 13, internal)
-		SWITCH_PORT(13, 14, internal)
-		SWITCH_PORT(14, 15, internal)
-		SWITCH_PORT(15, 16, internal)
-
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
-
-		port@24 {
-			reg = <24>;
-			label = "lan25";
-			pcs-handle = <&serdes4>;
-			phy-mode = "1000base-x";
-			managed = "in-band-status";
-			sfp = <&sfp0>;
-		};
-
-		port@26 {
-			reg = <26>;
-			label = "lan26";
-			pcs-handle = <&serdes5>;
-			phy-mode = "1000base-x";
-			managed = "in-band-status";
-			sfp = <&sfp1>;
-		};
-	};
-};
-
diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts
deleted file mode 100644
index c8722f0b70..0000000000
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24hp-v2.dts
+++ /dev/null
@@ -1,124 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
-
-/ {
-	compatible = "zyxel,gs1900-24hp-v2", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-24HP v2 Switch";
-
-	/* i2c of the left SFP cage: port 25 */
-	i2c0: i2c-gpio-0 {
-		compatible = "i2c-gpio";
-		sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		i2c-gpio,delay-us = <2>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-	};
-
-	sfp0: sfp-p25 {
-		compatible = "sff,sfp";
-		i2c-bus = <&i2c0>;
-		los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
-		tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
-		mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
-		tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
-	};
-
-	/* i2c of the right SFP cage: port 26 */
-	i2c1: i2c-gpio-1 {
-		compatible = "i2c-gpio";
-		sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-		i2c-gpio,delay-us = <2>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-	};
-
-	sfp1: sfp-p26 {
-		compatible = "sff,sfp";
-		i2c-bus = <&i2c1>;
-		los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
-		tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
-		mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
-		tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
-	};
-};
-
-&uart1 {
-	status = "okay";
-};
-
-&mdio_bus0 {
-	EXTERNAL_PHY(0)
-	EXTERNAL_PHY(1)
-	EXTERNAL_PHY(2)
-	EXTERNAL_PHY(3)
-	EXTERNAL_PHY(4)
-	EXTERNAL_PHY(5)
-	EXTERNAL_PHY(6)
-	EXTERNAL_PHY(7)
-
-	EXTERNAL_PHY(16)
-	EXTERNAL_PHY(17)
-	EXTERNAL_PHY(18)
-	EXTERNAL_PHY(19)
-	EXTERNAL_PHY(20)
-	EXTERNAL_PHY(21)
-	EXTERNAL_PHY(22)
-	EXTERNAL_PHY(23)
-
-	INTERNAL_PHY_SDS(24, 4)
-	INTERNAL_PHY_SDS(26, 5)
-};
-
-&switch0 {
-	ports {
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
-
-		SWITCH_PORT(8, 9, internal)
-		SWITCH_PORT(9, 10, internal)
-		SWITCH_PORT(10, 11, internal)
-		SWITCH_PORT(11, 12, internal)
-		SWITCH_PORT(12, 13, internal)
-		SWITCH_PORT(13, 14, internal)
-		SWITCH_PORT(14, 15, internal)
-		SWITCH_PORT(15, 16, internal)
-
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
-
-
-		port@24 {
-			reg = <24>;
-			label = "lan25";
-			pcs-handle = <&serdes4>;
-			phy-mode = "1000base-x";
-			managed = "in-band-status";
-			sfp = <&sfp0>;
-		};
-
-		port@26 {
-			reg = <26>;
-			label = "lan26";
-			pcs-handle = <&serdes5>;
-			phy-mode = "1000base-x";
-			managed = "in-band-status";
-			sfp = <&sfp1>;
-		};
-	};
-};
diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk
index 23fb19dba7..aa07bd371e 100644
--- a/target/linux/realtek/image/rtl838x.mk
+++ b/target/linux/realtek/image/rtl838x.mk
@@ -345,105 +345,118 @@ define Device/tplink_t1600g-28ts-v3
 endef
 TARGET_DEVICES += tplink_t1600g-28ts-v3
 
-define Device/zyxel_gs1900-10hp
+define Device/zyxel_gs1900-10hp-a1
   $(Device/zyxel_gs1900)
   SOC := rtl8380
   DEVICE_MODEL := GS1900-10HP
+  DEVICE_VARIANT := A1
   ZYXEL_VERS := AAZI
   DEVICE_PACKAGES += realtek-poe
+  SUPPORTED_DEVICES += zyxel,gs1900-10hp
 endef
-TARGET_DEVICES += zyxel_gs1900-10hp
+TARGET_DEVICES += zyxel_gs1900-10hp-a1
 
-define Device/zyxel_gs1900-16
+define Device/zyxel_gs1900-16-a1
   $(Device/zyxel_gs1900)
   SOC := rtl8382
   DEVICE_MODEL := GS1900-16
+  DEVICE_VARIANT := A1
   ZYXEL_VERS := AAHJ
+  SUPPORTED_DEVICES += zyxel,gs1900-16
 endef
-TARGET_DEVICES += zyxel_gs1900-16
+TARGET_DEVICES += zyxel_gs1900-16-a1
 
-define Device/zyxel_gs1900-8-v1
+define Device/zyxel_gs1900-8-a1
   $(Device/zyxel_gs1900)
   SOC := rtl8380
   DEVICE_MODEL := GS1900-8
-  DEVICE_VARIANT := v1
+  DEVICE_VARIANT := A1
   ZYXEL_VERS := AAHH
-  SUPPORTED_DEVICES += zyxel,gs1900-8
+  SUPPORTED_DEVICES += zyxel,gs1900-8 zyxel,gs1900-8-v1
 endef
-TARGET_DEVICES += zyxel_gs1900-8-v1
+TARGET_DEVICES += zyxel_gs1900-8-a1
 
-define Device/zyxel_gs1900-8-v2
+define Device/zyxel_gs1900-8-b1
   $(Device/zyxel_gs1900)
   SOC := rtl8380
   DEVICE_MODEL := GS1900-8
-  DEVICE_VARIANT := v2
+  DEVICE_VARIANT := B1
   ZYXEL_VERS := AAHH
-  SUPPORTED_DEVICES += zyxel,gs1900-8
+  SUPPORTED_DEVICES += zyxel,gs1900-8 zyxel,gs1900-8-v2
 endef
-TARGET_DEVICES += zyxel_gs1900-8-v2
+TARGET_DEVICES += zyxel_gs1900-8-b1
 
-define Device/zyxel_gs1900-8hp-v1
+define Device/zyxel_gs1900-8hp-a1
   $(Device/zyxel_gs1900)
   SOC := rtl8380
   DEVICE_MODEL := GS1900-8HP
-  DEVICE_VARIANT := v1
+  DEVICE_VARIANT := A1
   ZYXEL_VERS := AAHI
+  SUPPORTED_DEVICES += zyxel,gs1900-8hp-v1
   DEVICE_PACKAGES += realtek-poe
 endef
-TARGET_DEVICES += zyxel_gs1900-8hp-v1
+TARGET_DEVICES += zyxel_gs1900-8hp-a1
 
-define Device/zyxel_gs1900-8hp-v2
+define Device/zyxel_gs1900-8hp-b1
   $(Device/zyxel_gs1900)
   SOC := rtl8380
   DEVICE_MODEL := GS1900-8HP
-  DEVICE_VARIANT := v2
+  DEVICE_VARIANT := B1
   ZYXEL_VERS := AAHI
+  SUPPORTED_DEVICES += zyxel,gs1900-8hp-v2
   DEVICE_PACKAGES += realtek-poe
 endef
-TARGET_DEVICES += zyxel_gs1900-8hp-v2
+TARGET_DEVICES += zyxel_gs1900-8hp-b1
 
-define Device/zyxel_gs1900-24-v1
+define Device/zyxel_gs1900-24-a1
   $(Device/zyxel_gs1900)
   SOC := rtl8382
   DEVICE_MODEL := GS1900-24
-  DEVICE_VARIANT := v1
+  DEVICE_VARIANT := A1
   ZYXEL_VERS := AAHL
+  SUPPORTED_DEVICES += zyxel,gs1900-24-v1
 endef
-TARGET_DEVICES += zyxel_gs1900-24-v1
+TARGET_DEVICES += zyxel_gs1900-24-a1
 
-define Device/zyxel_gs1900-24e
+define Device/zyxel_gs1900-24e-a1
   $(Device/zyxel_gs1900)
   SOC := rtl8382
   DEVICE_MODEL := GS1900-24E
+  DEVICE_VARIANT := A1
   ZYXEL_VERS := AAHK
+  SUPPORTED_DEVICES += zyxel,gs1900-24e
 endef
-TARGET_DEVICES += zyxel_gs1900-24e
+TARGET_DEVICES += zyxel_gs1900-24e-a1
 
-define Device/zyxel_gs1900-24ep
+define Device/zyxel_gs1900-24ep-a1
   $(Device/zyxel_gs1900)
   SOC := rtl8382
   DEVICE_MODEL := GS1900-24EP
+  DEVICE_VARIANT := A1
   ZYXEL_VERS := ABTO
+  SUPPORTED_DEVICES += zyxel,gs1900-24ep
   DEVICE_PACKAGES += realtek-poe
 endef
-TARGET_DEVICES += zyxel_gs1900-24ep
+TARGET_DEVICES += zyxel_gs1900-24ep-a1
 
-define Device/zyxel_gs1900-24hp-v1
+define Device/zyxel_gs1900-24hp-a1
   $(Device/zyxel_gs1900)
   SOC := rtl8382
   DEVICE_MODEL := GS1900-24HP
-  DEVICE_VARIANT := v1
+  DEVICE_VARIANT := A1
   ZYXEL_VERS := AAHM
+  SUPPORTED_DEVICES += zyxel,gs1900-24hp-v1
   DEVICE_PACKAGES += realtek-poe
 endef
-TARGET_DEVICES += zyxel_gs1900-24hp-v1
+TARGET_DEVICES += zyxel_gs1900-24hp-a1
 
-define Device/zyxel_gs1900-24hp-v2
+define Device/zyxel_gs1900-24hp-b1
   $(Device/zyxel_gs1900)
   SOC := rtl8382
   DEVICE_MODEL := GS1900-24HP
-  DEVICE_VARIANT := v2
+  DEVICE_VARIANT := B1
   ZYXEL_VERS := ABTP
+  SUPPORTED_DEVICES += zyxel,gs1900-24hp-v2
   DEVICE_PACKAGES += realtek-poe
 endef
-TARGET_DEVICES += zyxel_gs1900-24hp-v2
+TARGET_DEVICES += zyxel_gs1900-24hp-b1