From: FUKAUMI Naoki Date: Tue, 2 Sep 2025 02:42:51 +0000 (+0000) Subject: rockchip: backport dts changes for Radxa ROCK 5C/5C Lite X-Git-Url: http://git.openwrt.org/?a=commitdiff_plain;h=73d50b420e545d3beebcf00430600a1fbb3ac8b4;p=openwrt%2Fstaging%2Fthess.git rockchip: backport dts changes for Radxa ROCK 5C/5C Lite Backport dts changes up to Linux v6.17 for Radxa ROCK 5C and 5C Lite. Signed-off-by: FUKAUMI Naoki Link: https://github.com/openwrt/openwrt/pull/19867 Signed-off-by: Hauke Mehrtens --- diff --git a/target/linux/rockchip/patches-6.12/004-01-v6.13-arm64-dts-rockchip-add-Radxa-ROCK-5C.patch b/target/linux/rockchip/patches-6.12/004-01-v6.13-arm64-dts-rockchip-add-Radxa-ROCK-5C.patch new file mode 100644 index 0000000000..d021e5d724 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/004-01-v6.13-arm64-dts-rockchip-add-Radxa-ROCK-5C.patch @@ -0,0 +1,957 @@ +From 3ddf5cdb77e6efd6fe9b70f36dec935e324a3cd2 Mon Sep 17 00:00:00 2001 +From: FUKAUMI Naoki +Date: Mon, 21 Oct 2024 09:05:47 +0000 +Subject: arm64: dts: rockchip: add Radxa ROCK 5C + +Radxa ROCK 5C is a 8K computer for everything[1] using the Rockchip +RK3588S2 chip: + +- Rockchip RK3588S2 +- Quad A76 and Quad A55 CPU +- 6 TOPS NPU +- up to 32GB LPDDR4x RAM +- eMMC / SPI flash connector +- Micro SD Card slot +- Gigabit ethernet port (supports PoE with add-on PoE HAT) +- WiFi6 / BT5.4 +- 1x USB 3.0 Type-A HOST port +- 1x USB 3.0 Type-A OTG port +- 2x USB 2.0 Type-A HOST port +- 1x USB Type-C 5V power port + +[1] https://radxa.com/products/rock5/5c + +Signed-off-by: FUKAUMI Naoki +Link: https://lore.kernel.org/r/20241021090548.1052-2-naoki@radxa.com +Signed-off-by: Heiko Stuebner + +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -156,3 +156,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-n + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-odroid-m2.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5c.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +@@ -0,0 +1,920 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd. ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include ++#include "rk3588s.dtsi" ++ ++/ { ++ model = "Radxa ROCK 5C"; ++ compatible = "radxa,rock-5c", "rockchip,rk3588s"; ++ ++ aliases { ++ ethernet0 = &gmac1; ++ mmc0 = &sdhci; ++ mmc1 = &sdmmc; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ analog-sound { ++ compatible = "audio-graph-card"; ++ label = "rk3588-es8316"; ++ dais = <&i2s0_8ch_p0>; ++ routing = "MIC2", "Mic Jack", ++ "Headphones", "HPOL", ++ "Headphones", "HPOR"; ++ widgets = "Microphone", "Mic Jack", ++ "Headphone", "Headphones"; ++ }; ++ ++ hdmi0-con { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi0_con_in: endpoint { ++ remote-endpoint = <&hdmi0_out_con>; ++ }; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_pins>; ++ ++ led-0 { ++ color = ; ++ default-state = "on"; ++ function = LED_FUNCTION_POWER; ++ gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ led-1 { ++ color = ; ++ default-state = "on"; ++ function = LED_FUNCTION_HEARTBEAT; ++ gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ fan { ++ compatible = "pwm-fan"; ++ #cooling-cells = <2>; ++ cooling-levels = <0 64 128 192 255>; ++ fan-supply = <&vcc_5v0>; ++ pwms = <&pwm3 0 10000 0>; ++ }; ++ ++ pcie2x1l2_3v3: regulator-pcie2x1l2-3v3 { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pow_en>; ++ regulator-name = "pcie2x1l2_3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_sysin>; ++ }; ++ ++ vcc5v_dcin: regulator-vcc5v-dcin { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v_dcin"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vcc5v0_usb_host: regulator-vcc5v0-usb-host { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb_host_pwren_h>; ++ regulator-name = "vcc5v0_usb_host"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sysin>; ++ }; ++ ++ vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb_otg_pwren_h>; ++ regulator-name = "vcc5v0_usb_otg0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sysin>; ++ }; ++ ++ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_1v1_nldo_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ vin-supply = <&vcc_sysin>; ++ }; ++ ++ vcc_3v3_pmu: regulator-vcc-3v3-pmu { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_3v3_pmu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ ++ vcc_3v3_s0: regulator-vcc-3v3-s0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_3v3_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_1v8_s0>; ++ }; ++ ++ vcc_5v0: regulator-vcc-5v0 { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc_5v0_pwren_h>; ++ regulator-name = "vcc_5v0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_sysin>; ++ }; ++ ++ vcc_sysin: regulator-vcc-sysin { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sysin"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v_dcin>; ++ }; ++ ++ vcca: regulator-vcca { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcca"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <4000000>; ++ regulator-max-microvolt = <4000000>; ++ vin-supply = <&vcc_sysin>; ++ }; ++ ++ vdd_3v3: regulator-vdd-3v3 { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb_wifi_pwr>; ++ regulator-name = "vdd_3v3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++}; ++ ++&combphy0_ps { ++ status = "okay"; ++}; ++ ++&combphy2_psu { ++ status = "okay"; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++}; ++ ++&cpu_b2 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++}; ++ ++&cpu_b3 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&gmac1 { ++ phy-handle = <&rgmii_phy1>; ++ phy-mode = "rgmii-id"; ++ phy-supply = <&vcc_3v3_s0>; ++ pinctrl-0 = <&gmac1_miim ++ &gmac1_tx_bus2 ++ &gmac1_rx_bus2 ++ &gmac1_rgmii_clk ++ &gmac1_rgmii_bus ++ &gmac1_clkinout>; ++ pinctrl-names = "default"; ++ status = "okay"; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu_s0>; ++ status = "okay"; ++}; ++ ++&hdmi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hdmim0_tx0_cec ++ &hdmim1_tx0_hpd ++ &hdmim0_tx0_scl ++ &hdmim0_tx0_sda>; ++ status = "okay"; ++}; ++ ++&hdmi0_in { ++ hdmi0_in_vp0: endpoint { ++ remote-endpoint = <&vp0_out_hdmi0>; ++ }; ++}; ++ ++&hdmi0_out { ++ hdmi0_out_con: endpoint { ++ remote-endpoint = <&hdmi0_con_in>; ++ }; ++}; ++ ++&hdptxphy_hdmi0 { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0m2_xfer>; ++ status = "okay"; ++ ++ vdd_cpu_big0_s0: regulator@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_big0_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_big1_s0: regulator@43 { ++ compatible = "rockchip,rk8603", "rockchip,rk8602"; ++ reg = <0x43>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_big1_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ eeprom@50 { ++ compatible = "belling,bl24c16a", "atmel,24c16"; ++ reg = <0x50>; ++ pagesize = <16>; ++ vcc-supply = <&vcc_3v3_pmu>; ++ }; ++}; ++ ++&i2c2 { ++ status = "okay"; ++ ++ vdd_npu_s0: regulator@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_npu_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c5 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c5m2_xfer>; ++ status = "okay"; ++ ++ rtc@51 { ++ compatible = "haoyu,hym8563"; ++ reg = <0x51>; ++ #clock-cells = <0>; ++ clock-output-names = "rtcic_32kout"; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rtc_int_l>; ++ }; ++}; ++ ++&i2c7 { ++ status = "okay"; ++ ++ audio-codec@11 { ++ compatible = "everest,es8316"; ++ reg = <0x11>; ++ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; ++ assigned-clock-rates = <12288000>; ++ clocks = <&cru I2S0_8CH_MCLKOUT>; ++ clock-names = "mclk"; ++ #sound-dai-cells = <0>; ++ ++ port { ++ es8316_p0_0: endpoint { ++ remote-endpoint = <&i2s0_8ch_p0_0>; ++ }; ++ }; ++ }; ++}; ++ ++&i2s0_8ch { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s0_lrck ++ &i2s0_mclk ++ &i2s0_sclk ++ &i2s0_sdi0 ++ &i2s0_sdo0>; ++ status = "okay"; ++ ++ i2s0_8ch_p0: port { ++ i2s0_8ch_p0_0: endpoint { ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ remote-endpoint = <&es8316_p0_0>; ++ }; ++ }; ++}; ++ ++&mdio1 { ++ rgmii_phy1: ethernet-phy@1 { ++ compatible = "ethernet-phy-id001c.c916"; ++ reg = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1_rstn>; ++ reset-assert-us = <20000>; ++ reset-deassert-us = <100000>; ++ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; ++ }; ++}; ++ ++&pcie2x1l2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie20x1_2_perstn_m0>; ++ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&pcie2x1l2_3v3>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ leds { ++ led_pins: led-pins { ++ rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, ++ <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ mdio { ++ gmac1_rstn: gmac1-rstn { ++ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pcie { ++ pcie20x1_2_perstn_m0: pcie20x1-2-perstn-m0 { ++ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pow_en: pow-en { ++ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ rtc { ++ rtc_int_l: rtc-int-l { ++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ usb_host_pwren_h: usb-host-pwren-h { ++ rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ usb_otg_pwren_h: usb-otg-pwren-h { ++ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ usb_wifi_pwr: usb-wifi-pwr { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ vcc_5v0_pwren_h: vcc-5v0-pwren-h { ++ rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm3m1_pins>; ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vcca_1v8_s0>; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ no-sdio; ++ no-sd; ++ non-removable; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ no-sdio; ++ no-mmc; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc_3v3_s3>; ++ vqmmc-supply = <&vccio_sd_s0>; ++ status = "okay"; ++}; ++ ++&sfc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fspim0_pins>; ++ ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <104000000>; ++ spi-rx-bus-width = <4>; ++ spi-tx-bus-width = <1>; ++ }; ++}; ++ ++&spi2 { ++ status = "okay"; ++ assigned-clocks = <&cru CLK_SPI2>; ++ assigned-clock-rates = <200000000>; ++ num-cs = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; ++ ++ pmic@0 { ++ compatible = "rockchip,rk806"; ++ reg = <0>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, ++ <&rk806_dvs2_null>, <&rk806_dvs3_null>; ++ spi-max-frequency = <1000000>; ++ system-power-controller; ++ ++ vcc1-supply = <&vcc_sysin>; ++ vcc2-supply = <&vcc_sysin>; ++ vcc3-supply = <&vcc_sysin>; ++ vcc4-supply = <&vcc_sysin>; ++ vcc5-supply = <&vcc_sysin>; ++ vcc6-supply = <&vcc_sysin>; ++ vcc7-supply = <&vcc_sysin>; ++ vcc8-supply = <&vcc_sysin>; ++ vcc9-supply = <&vcc_sysin>; ++ vcc10-supply = <&vcc_sysin>; ++ vcc11-supply = <&vcc_2v0_pldo_s3>; ++ vcc12-supply = <&vcc_sysin>; ++ vcc13-supply = <&vcc_1v1_nldo_s3>; ++ vcc14-supply = <&vcc_1v1_nldo_s3>; ++ vcca-supply = <&vcca>; ++ ++ rk806_dvs1_null: dvs1-null-pins { ++ pins = "gpio_pwrctrl1"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs2_null: dvs2-null-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs3_null: dvs3-null-pins { ++ pins = "gpio_pwrctrl3"; ++ function = "pin_fun0"; ++ }; ++ ++ regulators { ++ vdd_gpu_s0: dcdc-reg1 { ++ regulator-name = "vdd_gpu_s0"; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-enable-ramp-delay = <400>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_lit_s0: dcdc-reg2 { ++ regulator-name = "vdd_cpu_lit_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_logic_s0: dcdc-reg3 { ++ regulator-name = "vdd_logic_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <675000>; ++ regulator-max-microvolt = <750000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vdd_vdenc_s0: dcdc-reg4 { ++ regulator-name = "vdd_vdenc_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_ddr_s0: dcdc-reg5 { ++ regulator-name = "vdd_ddr_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <675000>; ++ regulator-max-microvolt = <900000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ vdd2_ddr_s3: dcdc-reg6 { ++ regulator-name = "vdd2_ddr_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_2v0_pldo_s3: dcdc-reg7 { ++ regulator-name = "vdd_2v0_pldo_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <2000000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <2000000>; ++ }; ++ }; ++ ++ vcc_3v3_s3: dcdc-reg8 { ++ regulator-name = "vcc_3v3_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vddq_ddr_s0: dcdc-reg9 { ++ regulator-name = "vddq_ddr_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc1v8_pmu_ddr_s3: dcdc-reg10 { ++ regulator-name = "vcc1v8_pmu_ddr_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_1v8_s0: pldo-reg1 { ++ regulator-name = "vcc_1v8_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca_1v8_s0: pldo-reg2 { ++ regulator-name = "vcca_1v8_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdda_1v2_s0: pldo-reg3 { ++ regulator-name = "vdda_1v2_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca_3v3_s0: pldo-reg4 { ++ regulator-name = "vcca_3v3_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vccio_sd_s0: pldo-reg5 { ++ regulator-name = "vccio_sd_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ pldo6_s3: pldo-reg6 { ++ regulator-name = "pldo6_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_0v75_s3: nldo-reg1 { ++ regulator-name = "vdd_0v75_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vdda_ddr_pll_s0: nldo-reg2 { ++ regulator-name = "vdda_ddr_pll_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ vdda_0v75_s0: nldo-reg3 { ++ regulator-name = "vdda_0v75_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v85_s0: nldo-reg4 { ++ regulator-name = "vdda_0v85_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_0v75_s0: nldo-reg5 { ++ regulator-name = "vdd_0v75_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ phy-supply = <&vcc5v0_usb_otg0>; ++ status = "okay"; ++}; ++ ++&u2phy2 { ++ status = "okay"; ++}; ++ ++&u2phy2_host { ++ /* connected to USB hub, which is powered by vcc_5v0 */ ++ phy-supply = <&vcc_5v0>; ++ status = "okay"; ++}; ++ ++&u2phy3 { ++ status = "okay"; ++}; ++ ++&u2phy3_host { ++ phy-supply = <&vcc5v0_usb_host>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-0 = <&uart2m0_xfer>; ++ status = "okay"; ++}; ++ ++&usbdp_phy0 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_xhci { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usb_host2_xhci { ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++}; ++ ++&vp0 { ++ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { ++ reg = ; ++ remote-endpoint = <&hdmi0_in_vp0>; ++ }; ++}; diff --git a/target/linux/rockchip/patches-6.12/004-02-v6.15-arm64-dts-rockchip-Add-finer-grained-PWM-states-for-.patch b/target/linux/rockchip/patches-6.12/004-02-v6.15-arm64-dts-rockchip-Add-finer-grained-PWM-states-for-.patch new file mode 100644 index 0000000000..802ab6b581 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/004-02-v6.15-arm64-dts-rockchip-Add-finer-grained-PWM-states-for-.patch @@ -0,0 +1,34 @@ +From 6ed35e6ff556626734c400fff5a636b38b91fe19 Mon Sep 17 00:00:00 2001 +From: Alexey Charkov +Date: Mon, 20 Jan 2025 23:22:46 +0400 +Subject: arm64: dts: rockchip: Add finer-grained PWM states for the fan on + Rock 5C + +Radxa Heatsink 6540B, which is the official cooling accessory for the +Rock 5C board, includes a small 5V fan, which in my testing spins up +reliably at a PWM setting of 24 (out of 255). It is also quite loud +at the current minimum setting of 64, and noticeably less so at 24. + +Introduce two intermediate PWM states at the lower end of the fan's +operating range to enable better balance between noise and cooling. + +Note further that, in my testing, having the fan run at 44 is enough +to keep the system from thermal throttling with sustained 100% load +on its 8 CPU cores (in 22C ambient temperature and no case) + +Signed-off-by: Alexey Charkov +Acked-by: Dragan Simic +Link: https://lore.kernel.org/r/20250120-rock-5c-fan-v1-1-5fb8446c981b@gmail.com +Signed-off-by: Heiko Stuebner + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +@@ -71,7 +71,7 @@ + fan { + compatible = "pwm-fan"; + #cooling-cells = <2>; +- cooling-levels = <0 64 128 192 255>; ++ cooling-levels = <0 24 44 64 128 192 255>; + fan-supply = <&vcc_5v0>; + pwms = <&pwm3 0 10000 0>; + }; diff --git a/target/linux/rockchip/patches-6.12/004-03-v6.15-arm64-dts-rockchip-Enable-automatic-fan-control-on-R.patch b/target/linux/rockchip/patches-6.12/004-03-v6.15-arm64-dts-rockchip-Enable-automatic-fan-control-on-R.patch new file mode 100644 index 0000000000..df9f58d25e --- /dev/null +++ b/target/linux/rockchip/patches-6.12/004-03-v6.15-arm64-dts-rockchip-Enable-automatic-fan-control-on-R.patch @@ -0,0 +1,62 @@ +From cd5681e63fb9887bd05d4ef59151d6a6b39c9d33 Mon Sep 17 00:00:00 2001 +From: Alexey Charkov +Date: Mon, 20 Jan 2025 23:22:47 +0400 +Subject: arm64: dts: rockchip: Enable automatic fan control on Radxa Rock 5C + +Add the necessary cooling map to enable the kernel's thermal subsystem +to manage the fan speed automatically depending on the overall SoC +package temperature on Radxa Rock 5C + +Signed-off-by: Alexey Charkov +Reviewed-by: Dragan Simic +Link: https://lore.kernel.org/r/20250120-rock-5c-fan-v1-2-5fb8446c981b@gmail.com +Signed-off-by: Heiko Stuebner + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +@@ -68,7 +68,7 @@ + }; + }; + +- fan { ++ fan: fan { + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-levels = <0 24 44 64 128 192 255>; +@@ -417,6 +417,36 @@ + }; + }; + ++&package_thermal { ++ polling-delay = <1000>; ++ ++ trips { ++ package_fan0: package-fan0 { ++ temperature = <55000>; ++ hysteresis = <2000>; ++ type = "active"; ++ }; ++ ++ package_fan1: package-fan1 { ++ temperature = <65000>; ++ hysteresis = <2000>; ++ type = "active"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&package_fan0>; ++ cooling-device = <&fan THERMAL_NO_LIMIT 1>; ++ }; ++ ++ map1 { ++ trip = <&package_fan1>; ++ cooling-device = <&fan 2 THERMAL_NO_LIMIT>; ++ }; ++ }; ++}; ++ + &pcie2x1l2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie20x1_2_perstn_m0>; diff --git a/target/linux/rockchip/patches-6.12/004-04-v6.15-arm64-dts-rockchip-Fix-label-name-of-hdptxphy-for-RK.patch b/target/linux/rockchip/patches-6.12/004-04-v6.15-arm64-dts-rockchip-Fix-label-name-of-hdptxphy-for-RK.patch new file mode 100644 index 0000000000..97fa8ef158 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/004-04-v6.15-arm64-dts-rockchip-Fix-label-name-of-hdptxphy-for-RK.patch @@ -0,0 +1,26 @@ +From 2efdb041019fd6c58abefba3eb6fdc4d659e576c Mon Sep 17 00:00:00 2001 +From: Damon Ding +Date: Thu, 6 Feb 2025 11:03:30 +0800 +Subject: arm64: dts: rockchip: Fix label name of hdptxphy for RK3588 + +The hdptxphy is a combo transmit-PHY for HDMI2.1 TMDS Link, FRL Link, DP +and eDP Link. Therefore, it is better to name it hdptxphy0 other than +hdptxphy_hdmi0, which will be referenced by both hdmi0 and edp0 nodes. + +Signed-off-by: Damon Ding +Link: https://lore.kernel.org/r/20250206030330.680424-3-damon.ding@rock-chips.com +[added armsom-sige7, where hdmi-support was added recently and also + the hdptxphy0-as-dclk source I just added] +Signed-off-by: Heiko Stuebner + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +@@ -278,7 +278,7 @@ + }; + }; + +-&hdptxphy_hdmi0 { ++&hdptxphy0 { + status = "okay"; + }; + diff --git a/target/linux/rockchip/patches-6.12/004-05-v6.15-arm64-dts-rockchip-switch-Rock-5C-to-PMIC-based-TSHU.patch b/target/linux/rockchip/patches-6.12/004-05-v6.15-arm64-dts-rockchip-switch-Rock-5C-to-PMIC-based-TSHU.patch new file mode 100644 index 0000000000..dbc5caf82d --- /dev/null +++ b/target/linux/rockchip/patches-6.12/004-05-v6.15-arm64-dts-rockchip-switch-Rock-5C-to-PMIC-based-TSHU.patch @@ -0,0 +1,36 @@ +From 52cababc9c1914ebf50929bfb9a67c8f74cd60ab Mon Sep 17 00:00:00 2001 +From: Alexey Charkov +Date: Tue, 4 Feb 2025 13:02:28 +0400 +Subject: arm64: dts: rockchip: switch Rock 5C to PMIC-based TSHUT reset + +Radxa Rock 5C supports both CRU-based (default) and PMIC-based reset +upon thermal runaway conditions. The former resets the SoC by internally +poking the CRU from TSADC, while the latter power-cycles the whole board +by pulling the PMIC reset line low in case of uncontrolled overheating. + +Switch to a PMIC-based reset, as the more 'thorough' of the two. + +Tested by temporarily setting rockchip,hw-tshut-temp to 65C to simulate +overheating - this causes the board to reset when any of the on-chip +temperature sensors surpasses the tshut temperature. + +Requires Alexander's patch [1] fixing TSADC pinctrl assignment + +[1] https://lore.kernel.org/r/20250130053849.4902-1-eagle.alexander923@gmail.com + +Signed-off-by: Alexey Charkov +Reviewed-by: Dragan Simic +Link: https://lore.kernel.org/r/20250204-rock-5c-tshut-v1-1-33301e4eef64@gmail.com +Signed-off-by: Heiko Stuebner + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +@@ -873,6 +873,8 @@ + }; + + &tsadc { ++ rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ + status = "okay"; + }; + diff --git a/target/linux/rockchip/patches-6.12/004-06-v6.15-arm64-dts-rockchip-Add-GPU-power-domain-regulator-de.patch b/target/linux/rockchip/patches-6.12/004-06-v6.15-arm64-dts-rockchip-Add-GPU-power-domain-regulator-de.patch new file mode 100644 index 0000000000..140ab58d12 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/004-06-v6.15-arm64-dts-rockchip-Add-GPU-power-domain-regulator-de.patch @@ -0,0 +1,48 @@ +From f94500eb7328b35f3d0927635b1aba26c85ea4b0 Mon Sep 17 00:00:00 2001 +From: Sebastian Reichel +Date: Thu, 20 Feb 2025 19:58:11 +0100 +Subject: arm64: dts: rockchip: Add GPU power domain regulator dependency for + RK3588 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Enabling the GPU power domain requires that the GPU regulator is +enabled. The regulator is enabled at boot time, but gets disabled +automatically when there are no users. + +This means the system might run into a failure state hanging the +whole system for the following use cases: + + * if the GPU driver is being probed late (e.g. build as a + module and firmware is not in initramfs), the regulator + might already have been disabled. In that case the power + domain is enabled before the regulator. + * unbinding the GPU driver will disable the PM domain and + the regulator. When the driver is bound again, the PM + domain will be enabled before the regulator and error + appears. + +Avoid this by adding an explicit regulator dependency to the +power domain. + +Tested-by: Heiko Stuebner +Reported-by: Adrián Martínez Larumbe +Tested-by: Adrian Larumbe # On Rock 5B +Signed-off-by: Sebastian Reichel +Link: https://lore.kernel.org/r/20250220-rk3588-gpu-pwr-domain-regulator-v6-8-a4f9c24e5b81@kernel.org +Signed-off-by: Heiko Stuebner + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +@@ -455,6 +455,10 @@ + status = "okay"; + }; + ++&pd_gpu { ++ domain-supply = <&vdd_gpu_s0>; ++}; ++ + &pinctrl { + leds { + led_pins: led-pins { diff --git a/target/linux/rockchip/patches-6.12/133-arm64-dts-rockchip-Update-LED-properties-for-Radxa-ROCK-5C.patch b/target/linux/rockchip/patches-6.12/133-arm64-dts-rockchip-Update-LED-properties-for-Radxa-ROCK-5C.patch new file mode 100644 index 0000000000..fadc372e71 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/133-arm64-dts-rockchip-Update-LED-properties-for-Radxa-ROCK-5C.patch @@ -0,0 +1,33 @@ +--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +@@ -19,6 +19,10 @@ + ethernet0 = &gmac1; + mmc0 = &sdhci; + mmc1 = &sdmmc; ++ led-boot = &led_green; ++ led-failsafe = &led_green; ++ led-running = &led_green; ++ led-upgrade = &led_green; + }; + + chosen { +@@ -52,7 +56,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&led_pins>; + +- led-0 { ++ led_green: led-0 { + color = ; + default-state = "on"; + function = LED_FUNCTION_POWER; +@@ -61,10 +65,8 @@ + + led-1 { + color = ; +- default-state = "on"; + function = LED_FUNCTION_HEARTBEAT; + gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; +- linux,default-trigger = "heartbeat"; + }; + }; +