From: Sami Mujawar Date: Thu, 9 May 2019 12:43:30 +0000 (+0100) Subject: N1SDP: Fix DRAM2 start address X-Git-Url: http://git.openwrt.org/?a=commitdiff_plain;h=49d64e5d0e8d63dadc3efb1b32579973dd677c41;p=project%2Fbcm63xx%2Fatf.git N1SDP: Fix DRAM2 start address The default DRAM2 start address for Arm platforms is 0x880000000. However, for N1SDP platform this is 0x8080000000. Fix the DRAM2 start address by initialising PLAT_ARM_DRAM2_BASE. Without this fix there is a mismatch of the System memory region view as seen by the BL31 runtime firmware (PSCI) versus the view of the OS (which is based on the description provided by UEFI. In this case UEFI is correctly describing the DRAM2 start address). This implicates in secondary cores failing to start on some Operating Systems if the OS decides to place the secondary start address in the mismatched region. Change-Id: I57220e753219353dda429868b4c5e1a69944cc64 Signed-off-by: Sami Mujawar --- diff --git a/plat/arm/board/n1sdp/include/platform_def.h b/plat/arm/board/n1sdp/include/platform_def.h index adb957e5..0964f568 100644 --- a/plat/arm/board/n1sdp/include/platform_def.h +++ b/plat/arm/board/n1sdp/include/platform_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -24,6 +24,7 @@ #define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_RUN_UART_BASE #define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_RUN_UART_CLK_IN_HZ +#define PLAT_ARM_DRAM2_BASE ULL(0x8080000000) #define PLAT_ARM_DRAM2_SIZE ULL(0x780000000) #if CSS_USE_SCMI_SDS_DRIVER