From: Soby Mathew Date: Fri, 8 Apr 2016 15:42:58 +0000 (+0100) Subject: Migrate platform ports to the new xlat_tables library X-Git-Url: http://git.openwrt.org/?a=commitdiff_plain;h=3e4b8fdcd3794ca07135521a5fd4c3141624f17c;p=project%2Fbcm63xx%2Fatf.git Migrate platform ports to the new xlat_tables library This patch modifies the upstream platform port makefiles to use the new xlat_tables library files. This patch also makes mmap region setup common between AArch64 and AArch32 for FVP platform port. The file `fvp_common.c` is moved from the `plat/arm/board/fvp/aarch64` folder to the parent folder as it is not specific to AArch64. Change-Id: Id2e9aac45e46227b6f83cccfd1e915404018ea0b --- diff --git a/plat/arm/board/fvp/aarch64/fvp_common.c b/plat/arm/board/fvp/aarch64/fvp_common.c deleted file mode 100644 index 1de99991..00000000 --- a/plat/arm/board/fvp/aarch64/fvp_common.c +++ /dev/null @@ -1,251 +0,0 @@ -/* - * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include "../fvp_def.h" - -#if (FVP_USE_GIC_DRIVER == FVP_GICV2) -extern gicv2_driver_data_t arm_gic_data; -#endif - -/* Defines for GIC Driver build time selection */ -#define FVP_GICV2 1 -#define FVP_GICV3 2 -#define FVP_GICV3_LEGACY 3 - -/******************************************************************************* - * arm_config holds the characteristics of the differences between the three FVP - * platforms (Base, A53_A57 & Foundation). It will be populated during cold boot - * at each boot stage by the primary before enabling the MMU (to allow - * interconnect configuration) & used thereafter. Each BL will have its own copy - * to allow independent operation. - ******************************************************************************/ -arm_config_t arm_config; - -#define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \ - DEVICE0_SIZE, \ - MT_DEVICE | MT_RW | MT_SECURE) - -#define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \ - DEVICE1_SIZE, \ - MT_DEVICE | MT_RW | MT_SECURE) - -#define MAP_DEVICE2 MAP_REGION_FLAT(DEVICE2_BASE, \ - DEVICE2_SIZE, \ - MT_DEVICE | MT_RO | MT_SECURE) - - -/* - * Table of regions for various BL stages to map using the MMU. - * This doesn't include TZRAM as the 'mem_layout' argument passed to - * arm_configure_mmu_elx() will give the available subset of that, - */ -#if IMAGE_BL1 -const mmap_region_t plat_arm_mmap[] = { - ARM_MAP_SHARED_RAM, - V2M_MAP_FLASH0_RW, - V2M_MAP_IOFPGA, - MAP_DEVICE0, - MAP_DEVICE1, - MAP_DEVICE2, -#if TRUSTED_BOARD_BOOT - ARM_MAP_NS_DRAM1, -#endif - {0} -}; -#endif -#if IMAGE_BL2 -const mmap_region_t plat_arm_mmap[] = { - ARM_MAP_SHARED_RAM, - V2M_MAP_FLASH0_RW, - V2M_MAP_IOFPGA, - MAP_DEVICE0, - MAP_DEVICE1, - MAP_DEVICE2, - ARM_MAP_NS_DRAM1, - ARM_MAP_TSP_SEC_MEM, -#if ARM_BL31_IN_DRAM - ARM_MAP_BL31_SEC_DRAM, -#endif - {0} -}; -#endif -#if IMAGE_BL2U -const mmap_region_t plat_arm_mmap[] = { - MAP_DEVICE0, - V2M_MAP_IOFPGA, - {0} -}; -#endif -#if IMAGE_BL31 -const mmap_region_t plat_arm_mmap[] = { - ARM_MAP_SHARED_RAM, - V2M_MAP_IOFPGA, - MAP_DEVICE0, - MAP_DEVICE1, - {0} -}; -#endif -#if IMAGE_BL32 -const mmap_region_t plat_arm_mmap[] = { - V2M_MAP_IOFPGA, - MAP_DEVICE0, - MAP_DEVICE1, - {0} -}; -#endif - -ARM_CASSERT_MMAP - - -/******************************************************************************* - * A single boot loader stack is expected to work on both the Foundation FVP - * models and the two flavours of the Base FVP models (AEMv8 & Cortex). The - * SYS_ID register provides a mechanism for detecting the differences between - * these platforms. This information is stored in a per-BL array to allow the - * code to take the correct path.Per BL platform configuration. - ******************************************************************************/ -void fvp_config_setup(void) -{ - unsigned int rev, hbi, bld, arch, sys_id; - - sys_id = mmio_read_32(V2M_SYSREGS_BASE + V2M_SYS_ID); - rev = (sys_id >> V2M_SYS_ID_REV_SHIFT) & V2M_SYS_ID_REV_MASK; - hbi = (sys_id >> V2M_SYS_ID_HBI_SHIFT) & V2M_SYS_ID_HBI_MASK; - bld = (sys_id >> V2M_SYS_ID_BLD_SHIFT) & V2M_SYS_ID_BLD_MASK; - arch = (sys_id >> V2M_SYS_ID_ARCH_SHIFT) & V2M_SYS_ID_ARCH_MASK; - - if (arch != ARCH_MODEL) { - ERROR("This firmware is for FVP models\n"); - panic(); - } - - /* - * The build field in the SYS_ID tells which variant of the GIC - * memory is implemented by the model. - */ - switch (bld) { - case BLD_GIC_VE_MMAP: -#if IMAGE_BL31 || IMAGE_BL32 -#if FVP_USE_GIC_DRIVER == FVP_GICV2 - /* - * If the FVP implements the VE compatible memory map, then the - * GICv2 driver must be included in the build. Update the platform - * data with the correct GICv2 base addresses before it is used - * to initialise the driver. - * - * This update of platform data is temporary and will be removed - * once VE memory map for FVP is no longer supported by Trusted - * Firmware. - */ - arm_gic_data.gicd_base = VE_GICD_BASE; - arm_gic_data.gicc_base = VE_GICC_BASE; - -#else - ERROR("Only GICv2 driver supported for VE memory map\n"); - panic(); -#endif /* __FVP_USE_GIC_DRIVER == FVP_GICV2__ */ -#endif /* __IMAGE_BL31 || IMAGE_BL32__ */ - break; - case BLD_GIC_A53A57_MMAP: - break; - default: - ERROR("Unsupported board build %x\n", bld); - panic(); - } - - /* - * The hbi field in the SYS_ID is 0x020 for the Base FVP & 0x010 - * for the Foundation FVP. - */ - switch (hbi) { - case HBI_FOUNDATION_FVP: - arm_config.flags = 0; - - /* - * Check for supported revisions of Foundation FVP - * Allow future revisions to run but emit warning diagnostic - */ - switch (rev) { - case REV_FOUNDATION_FVP_V2_0: - case REV_FOUNDATION_FVP_V2_1: - case REV_FOUNDATION_FVP_v9_1: - break; - default: - WARN("Unrecognized Foundation FVP revision %x\n", rev); - break; - } - break; - case HBI_BASE_FVP: - arm_config.flags |= ARM_CONFIG_BASE_MMAP | - ARM_CONFIG_HAS_INTERCONNECT | ARM_CONFIG_HAS_TZC; - - /* - * Check for supported revisions - * Allow future revisions to run but emit warning diagnostic - */ - switch (rev) { - case REV_BASE_FVP_V0: - break; - default: - WARN("Unrecognized Base FVP revision %x\n", rev); - break; - } - break; - default: - ERROR("Unsupported board HBI number 0x%x\n", hbi); - panic(); - } -} - - -void fvp_interconnect_init(void) -{ - if (arm_config.flags & ARM_CONFIG_HAS_INTERCONNECT) - plat_arm_interconnect_init(); -} - -void fvp_interconnect_enable(void) -{ - if (arm_config.flags & ARM_CONFIG_HAS_INTERCONNECT) - plat_arm_interconnect_enter_coherency(); -} - -void fvp_interconnect_disable(void) -{ - if (arm_config.flags & ARM_CONFIG_HAS_INTERCONNECT) - plat_arm_interconnect_exit_coherency(); -} diff --git a/plat/arm/board/fvp/fvp_common.c b/plat/arm/board/fvp/fvp_common.c new file mode 100644 index 00000000..1de99991 --- /dev/null +++ b/plat/arm/board/fvp/fvp_common.c @@ -0,0 +1,251 @@ +/* + * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "../fvp_def.h" + +#if (FVP_USE_GIC_DRIVER == FVP_GICV2) +extern gicv2_driver_data_t arm_gic_data; +#endif + +/* Defines for GIC Driver build time selection */ +#define FVP_GICV2 1 +#define FVP_GICV3 2 +#define FVP_GICV3_LEGACY 3 + +/******************************************************************************* + * arm_config holds the characteristics of the differences between the three FVP + * platforms (Base, A53_A57 & Foundation). It will be populated during cold boot + * at each boot stage by the primary before enabling the MMU (to allow + * interconnect configuration) & used thereafter. Each BL will have its own copy + * to allow independent operation. + ******************************************************************************/ +arm_config_t arm_config; + +#define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \ + DEVICE0_SIZE, \ + MT_DEVICE | MT_RW | MT_SECURE) + +#define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \ + DEVICE1_SIZE, \ + MT_DEVICE | MT_RW | MT_SECURE) + +#define MAP_DEVICE2 MAP_REGION_FLAT(DEVICE2_BASE, \ + DEVICE2_SIZE, \ + MT_DEVICE | MT_RO | MT_SECURE) + + +/* + * Table of regions for various BL stages to map using the MMU. + * This doesn't include TZRAM as the 'mem_layout' argument passed to + * arm_configure_mmu_elx() will give the available subset of that, + */ +#if IMAGE_BL1 +const mmap_region_t plat_arm_mmap[] = { + ARM_MAP_SHARED_RAM, + V2M_MAP_FLASH0_RW, + V2M_MAP_IOFPGA, + MAP_DEVICE0, + MAP_DEVICE1, + MAP_DEVICE2, +#if TRUSTED_BOARD_BOOT + ARM_MAP_NS_DRAM1, +#endif + {0} +}; +#endif +#if IMAGE_BL2 +const mmap_region_t plat_arm_mmap[] = { + ARM_MAP_SHARED_RAM, + V2M_MAP_FLASH0_RW, + V2M_MAP_IOFPGA, + MAP_DEVICE0, + MAP_DEVICE1, + MAP_DEVICE2, + ARM_MAP_NS_DRAM1, + ARM_MAP_TSP_SEC_MEM, +#if ARM_BL31_IN_DRAM + ARM_MAP_BL31_SEC_DRAM, +#endif + {0} +}; +#endif +#if IMAGE_BL2U +const mmap_region_t plat_arm_mmap[] = { + MAP_DEVICE0, + V2M_MAP_IOFPGA, + {0} +}; +#endif +#if IMAGE_BL31 +const mmap_region_t plat_arm_mmap[] = { + ARM_MAP_SHARED_RAM, + V2M_MAP_IOFPGA, + MAP_DEVICE0, + MAP_DEVICE1, + {0} +}; +#endif +#if IMAGE_BL32 +const mmap_region_t plat_arm_mmap[] = { + V2M_MAP_IOFPGA, + MAP_DEVICE0, + MAP_DEVICE1, + {0} +}; +#endif + +ARM_CASSERT_MMAP + + +/******************************************************************************* + * A single boot loader stack is expected to work on both the Foundation FVP + * models and the two flavours of the Base FVP models (AEMv8 & Cortex). The + * SYS_ID register provides a mechanism for detecting the differences between + * these platforms. This information is stored in a per-BL array to allow the + * code to take the correct path.Per BL platform configuration. + ******************************************************************************/ +void fvp_config_setup(void) +{ + unsigned int rev, hbi, bld, arch, sys_id; + + sys_id = mmio_read_32(V2M_SYSREGS_BASE + V2M_SYS_ID); + rev = (sys_id >> V2M_SYS_ID_REV_SHIFT) & V2M_SYS_ID_REV_MASK; + hbi = (sys_id >> V2M_SYS_ID_HBI_SHIFT) & V2M_SYS_ID_HBI_MASK; + bld = (sys_id >> V2M_SYS_ID_BLD_SHIFT) & V2M_SYS_ID_BLD_MASK; + arch = (sys_id >> V2M_SYS_ID_ARCH_SHIFT) & V2M_SYS_ID_ARCH_MASK; + + if (arch != ARCH_MODEL) { + ERROR("This firmware is for FVP models\n"); + panic(); + } + + /* + * The build field in the SYS_ID tells which variant of the GIC + * memory is implemented by the model. + */ + switch (bld) { + case BLD_GIC_VE_MMAP: +#if IMAGE_BL31 || IMAGE_BL32 +#if FVP_USE_GIC_DRIVER == FVP_GICV2 + /* + * If the FVP implements the VE compatible memory map, then the + * GICv2 driver must be included in the build. Update the platform + * data with the correct GICv2 base addresses before it is used + * to initialise the driver. + * + * This update of platform data is temporary and will be removed + * once VE memory map for FVP is no longer supported by Trusted + * Firmware. + */ + arm_gic_data.gicd_base = VE_GICD_BASE; + arm_gic_data.gicc_base = VE_GICC_BASE; + +#else + ERROR("Only GICv2 driver supported for VE memory map\n"); + panic(); +#endif /* __FVP_USE_GIC_DRIVER == FVP_GICV2__ */ +#endif /* __IMAGE_BL31 || IMAGE_BL32__ */ + break; + case BLD_GIC_A53A57_MMAP: + break; + default: + ERROR("Unsupported board build %x\n", bld); + panic(); + } + + /* + * The hbi field in the SYS_ID is 0x020 for the Base FVP & 0x010 + * for the Foundation FVP. + */ + switch (hbi) { + case HBI_FOUNDATION_FVP: + arm_config.flags = 0; + + /* + * Check for supported revisions of Foundation FVP + * Allow future revisions to run but emit warning diagnostic + */ + switch (rev) { + case REV_FOUNDATION_FVP_V2_0: + case REV_FOUNDATION_FVP_V2_1: + case REV_FOUNDATION_FVP_v9_1: + break; + default: + WARN("Unrecognized Foundation FVP revision %x\n", rev); + break; + } + break; + case HBI_BASE_FVP: + arm_config.flags |= ARM_CONFIG_BASE_MMAP | + ARM_CONFIG_HAS_INTERCONNECT | ARM_CONFIG_HAS_TZC; + + /* + * Check for supported revisions + * Allow future revisions to run but emit warning diagnostic + */ + switch (rev) { + case REV_BASE_FVP_V0: + break; + default: + WARN("Unrecognized Base FVP revision %x\n", rev); + break; + } + break; + default: + ERROR("Unsupported board HBI number 0x%x\n", hbi); + panic(); + } +} + + +void fvp_interconnect_init(void) +{ + if (arm_config.flags & ARM_CONFIG_HAS_INTERCONNECT) + plat_arm_interconnect_init(); +} + +void fvp_interconnect_enable(void) +{ + if (arm_config.flags & ARM_CONFIG_HAS_INTERCONNECT) + plat_arm_interconnect_enter_coherency(); +} + +void fvp_interconnect_disable(void) +{ + if (arm_config.flags & ARM_CONFIG_HAS_INTERCONNECT) + plat_arm_interconnect_exit_coherency(); +} diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk index afd939d1..60ebe65b 100644 --- a/plat/arm/board/fvp/platform.mk +++ b/plat/arm/board/fvp/platform.mk @@ -73,7 +73,7 @@ FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ PLAT_INCLUDES := -Iplat/arm/board/fvp/include -PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/aarch64/fvp_common.c +PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c FVP_CPU_LIBS := lib/cpus/aarch64/aem_generic.S \ lib/cpus/aarch64/cortex_a35.S \ diff --git a/plat/arm/common/arm_common.mk b/plat/arm/common/arm_common.mk index 973e583e..0b288617 100644 --- a/plat/arm/common/arm_common.mk +++ b/plat/arm/common/arm_common.mk @@ -87,7 +87,8 @@ PLAT_INCLUDES += -Iinclude/common/tbbr \ -Iinclude/plat/arm/common/aarch64 -PLAT_BL_COMMON_SOURCES += lib/aarch64/xlat_tables.c \ +PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ + lib/xlat_tables/aarch64/xlat_tables.c \ plat/arm/common/aarch64/arm_common.c \ plat/arm/common/aarch64/arm_helpers.S \ plat/common/aarch64/plat_common.c diff --git a/plat/mediatek/mt8173/platform.mk b/plat/mediatek/mt8173/platform.mk index 4169823f..f0451b92 100644 --- a/plat/mediatek/mt8173/platform.mk +++ b/plat/mediatek/mt8173/platform.mk @@ -40,7 +40,8 @@ PLAT_INCLUDES := -I${MTK_PLAT}/common/ \ -I${MTK_PLAT_SOC}/drivers/uart/ \ -I${MTK_PLAT_SOC}/include/ -PLAT_BL_COMMON_SOURCES := lib/aarch64/xlat_tables.c \ +PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ + lib/xlat_tables/aarch64/xlat_tables.c \ plat/common/aarch64/plat_common.c \ plat/common/plat_gic.c diff --git a/plat/nvidia/tegra/common/tegra_common.mk b/plat/nvidia/tegra/common/tegra_common.mk index fcebde30..2ecf5f5e 100644 --- a/plat/nvidia/tegra/common/tegra_common.mk +++ b/plat/nvidia/tegra/common/tegra_common.mk @@ -40,7 +40,8 @@ PLAT_INCLUDES := -Iplat/nvidia/tegra/include/drivers \ -Iplat/nvidia/tegra/include \ -Iplat/nvidia/tegra/include/${TARGET_SOC} -PLAT_BL_COMMON_SOURCES := lib/aarch64/xlat_tables.c \ +PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ + lib/xlat_tables/aarch64/xlat_tables.c \ plat/common/aarch64/plat_common.c COMMON_DIR := plat/nvidia/tegra/common diff --git a/plat/rockchip/rk3368/platform.mk b/plat/rockchip/rk3368/platform.mk index 4fadf218..0d34cf4e 100644 --- a/plat/rockchip/rk3368/platform.mk +++ b/plat/rockchip/rk3368/platform.mk @@ -48,7 +48,8 @@ RK_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ plat/common/plat_gicv2.c \ ${RK_PLAT}/common/rockchip_gicv2.c -PLAT_BL_COMMON_SOURCES := lib/aarch64/xlat_tables.c \ +PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ + lib/xlat_tables/aarch64/xlat_tables.c \ plat/common/aarch64/plat_common.c \ plat/common/aarch64/plat_psci_common.c diff --git a/plat/rockchip/rk3399/platform.mk b/plat/rockchip/rk3399/platform.mk index 78517263..6d7e1347 100644 --- a/plat/rockchip/rk3399/platform.mk +++ b/plat/rockchip/rk3399/platform.mk @@ -47,7 +47,8 @@ RK_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ plat/common/plat_gicv3.c \ ${RK_PLAT}/common/rockchip_gicv3.c -PLAT_BL_COMMON_SOURCES := lib/aarch64/xlat_tables.c \ +PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ + lib/xlat_tables/aarch64/xlat_tables.c \ plat/common/aarch64/plat_common.c \ plat/common/aarch64/plat_psci_common.c diff --git a/plat/xilinx/zynqmp/platform.mk b/plat/xilinx/zynqmp/platform.mk index 0ffc0a9c..febff29f 100644 --- a/plat/xilinx/zynqmp/platform.mk +++ b/plat/xilinx/zynqmp/platform.mk @@ -60,7 +60,8 @@ PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ -Iplat/xilinx/zynqmp/include/ \ -Iplat/xilinx/zynqmp/pm_service/ -PLAT_BL_COMMON_SOURCES := lib/aarch64/xlat_tables.c \ +PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ + lib/xlat_tables/aarch64/xlat_tables.c \ drivers/arm/gic/common/gic_common.c \ drivers/arm/gic/v2/gicv2_main.c \ drivers/arm/gic/v2/gicv2_helpers.c \