From: Christian Marangi Date: Mon, 1 Sep 2025 16:23:58 +0000 (+0200) Subject: airoha: backport trivial fixes for pinctrl and ethernet driver X-Git-Url: http://git.openwrt.org/?a=commitdiff_plain;h=354d7472d5c6b06e0c11606e1b9104a5f7d24374;p=openwrt%2Fstaging%2Fnbd.git airoha: backport trivial fixes for pinctrl and ethernet driver Backport trivial fixes from upstream related to pinctrl and ethernet driver. Link: https://github.com/openwrt/openwrt/pull/19816 Signed-off-by: Christian Marangi --- diff --git a/target/linux/airoha/patches-6.6/051-v6.15-pinctrl-airoha-fix-wrong-PHY-LED-mapping-and-PHY2-LE.patch b/target/linux/airoha/patches-6.6/051-v6.15-pinctrl-airoha-fix-wrong-PHY-LED-mapping-and-PHY2-LE.patch new file mode 100644 index 0000000000..386532781f --- /dev/null +++ b/target/linux/airoha/patches-6.6/051-v6.15-pinctrl-airoha-fix-wrong-PHY-LED-mapping-and-PHY2-LE.patch @@ -0,0 +1,435 @@ +From 457d9772e8a5cdae64f66b5f7d5b0247365191ec Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 1 Apr 2025 15:50:21 +0200 +Subject: [PATCH] pinctrl: airoha: fix wrong PHY LED mapping and PHY2 LED + defines + +The current PHY2 LED define are wrong and actually set BITs outside the +related mask. Fix it and set the correct value. While at it, also use +FIELD_PREP_CONST macro to make it simple to understand what values are +actually applied for the mask. + +Also fix wrong PHY LED mapping. The SoC Switch supports up to 4 port but +the register define mapping for 5 PHY port, starting from 0. The mapping +was wrongly defined starting from PHY1. Reorder the function group to +start from PHY0. PHY4 is actually never supported as we don't have a +GPIO pin to assign. + +Cc: stable@vger.kernel.org +Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") +Reviewed-by: Benjamin Larsson +Signed-off-by: Christian Marangi +Acked-by: Lorenzo Bianconi +Link: https://lore.kernel.org/20250401135026.18018-1-ansuelsmth@gmail.com +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/mediatek/pinctrl-airoha.c | 159 ++++++++++------------ + 1 file changed, 70 insertions(+), 89 deletions(-) + +--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c ++++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c +@@ -6,6 +6,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -106,39 +107,19 @@ + #define REG_LAN_LED1_MAPPING 0x0280 + + #define LAN4_LED_MAPPING_MASK GENMASK(18, 16) +-#define LAN4_PHY4_LED_MAP BIT(18) +-#define LAN4_PHY2_LED_MAP BIT(17) +-#define LAN4_PHY1_LED_MAP BIT(16) +-#define LAN4_PHY0_LED_MAP 0 +-#define LAN4_PHY3_LED_MAP GENMASK(17, 16) ++#define LAN4_PHY_LED_MAP(_n) FIELD_PREP_CONST(LAN4_LED_MAPPING_MASK, (_n)) + + #define LAN3_LED_MAPPING_MASK GENMASK(14, 12) +-#define LAN3_PHY4_LED_MAP BIT(14) +-#define LAN3_PHY2_LED_MAP BIT(13) +-#define LAN3_PHY1_LED_MAP BIT(12) +-#define LAN3_PHY0_LED_MAP 0 +-#define LAN3_PHY3_LED_MAP GENMASK(13, 12) ++#define LAN3_PHY_LED_MAP(_n) FIELD_PREP_CONST(LAN3_LED_MAPPING_MASK, (_n)) + + #define LAN2_LED_MAPPING_MASK GENMASK(10, 8) +-#define LAN2_PHY4_LED_MAP BIT(12) +-#define LAN2_PHY2_LED_MAP BIT(11) +-#define LAN2_PHY1_LED_MAP BIT(10) +-#define LAN2_PHY0_LED_MAP 0 +-#define LAN2_PHY3_LED_MAP GENMASK(11, 10) ++#define LAN2_PHY_LED_MAP(_n) FIELD_PREP_CONST(LAN2_LED_MAPPING_MASK, (_n)) + + #define LAN1_LED_MAPPING_MASK GENMASK(6, 4) +-#define LAN1_PHY4_LED_MAP BIT(6) +-#define LAN1_PHY2_LED_MAP BIT(5) +-#define LAN1_PHY1_LED_MAP BIT(4) +-#define LAN1_PHY0_LED_MAP 0 +-#define LAN1_PHY3_LED_MAP GENMASK(5, 4) ++#define LAN1_PHY_LED_MAP(_n) FIELD_PREP_CONST(LAN1_LED_MAPPING_MASK, (_n)) + + #define LAN0_LED_MAPPING_MASK GENMASK(2, 0) +-#define LAN0_PHY4_LED_MAP BIT(3) +-#define LAN0_PHY2_LED_MAP BIT(2) +-#define LAN0_PHY1_LED_MAP BIT(1) +-#define LAN0_PHY0_LED_MAP 0 +-#define LAN0_PHY3_LED_MAP GENMASK(2, 1) ++#define LAN0_PHY_LED_MAP(_n) FIELD_PREP_CONST(LAN0_LED_MAPPING_MASK, (_n)) + + /* CONF */ + #define REG_I2C_SDA_E2 0x001c +@@ -1470,8 +1451,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN1_LED_MAPPING_MASK, +- LAN1_PHY1_LED_MAP ++ LAN0_LED_MAPPING_MASK, ++ LAN0_PHY_LED_MAP(0) + }, + .regmap_size = 2, + }, { +@@ -1485,8 +1466,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN2_LED_MAPPING_MASK, +- LAN2_PHY1_LED_MAP ++ LAN1_LED_MAPPING_MASK, ++ LAN1_PHY_LED_MAP(0) + }, + .regmap_size = 2, + }, { +@@ -1500,8 +1481,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN3_LED_MAPPING_MASK, +- LAN3_PHY1_LED_MAP ++ LAN2_LED_MAPPING_MASK, ++ LAN2_PHY_LED_MAP(0) + }, + .regmap_size = 2, + }, { +@@ -1515,8 +1496,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN4_LED_MAPPING_MASK, +- LAN4_PHY1_LED_MAP ++ LAN3_LED_MAPPING_MASK, ++ LAN3_PHY_LED_MAP(0) + }, + .regmap_size = 2, + }, +@@ -1534,8 +1515,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN1_LED_MAPPING_MASK, +- LAN1_PHY2_LED_MAP ++ LAN0_LED_MAPPING_MASK, ++ LAN0_PHY_LED_MAP(1) + }, + .regmap_size = 2, + }, { +@@ -1549,8 +1530,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN2_LED_MAPPING_MASK, +- LAN2_PHY2_LED_MAP ++ LAN1_LED_MAPPING_MASK, ++ LAN1_PHY_LED_MAP(1) + }, + .regmap_size = 2, + }, { +@@ -1564,8 +1545,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN3_LED_MAPPING_MASK, +- LAN3_PHY2_LED_MAP ++ LAN2_LED_MAPPING_MASK, ++ LAN2_PHY_LED_MAP(1) + }, + .regmap_size = 2, + }, { +@@ -1579,8 +1560,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN4_LED_MAPPING_MASK, +- LAN4_PHY2_LED_MAP ++ LAN3_LED_MAPPING_MASK, ++ LAN3_PHY_LED_MAP(1) + }, + .regmap_size = 2, + }, +@@ -1598,8 +1579,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN1_LED_MAPPING_MASK, +- LAN1_PHY3_LED_MAP ++ LAN0_LED_MAPPING_MASK, ++ LAN0_PHY_LED_MAP(2) + }, + .regmap_size = 2, + }, { +@@ -1613,8 +1594,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN2_LED_MAPPING_MASK, +- LAN2_PHY3_LED_MAP ++ LAN1_LED_MAPPING_MASK, ++ LAN1_PHY_LED_MAP(2) + }, + .regmap_size = 2, + }, { +@@ -1628,8 +1609,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN3_LED_MAPPING_MASK, +- LAN3_PHY3_LED_MAP ++ LAN2_LED_MAPPING_MASK, ++ LAN2_PHY_LED_MAP(2) + }, + .regmap_size = 2, + }, { +@@ -1643,8 +1624,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN4_LED_MAPPING_MASK, +- LAN4_PHY3_LED_MAP ++ LAN3_LED_MAPPING_MASK, ++ LAN3_PHY_LED_MAP(2) + }, + .regmap_size = 2, + }, +@@ -1662,8 +1643,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN1_LED_MAPPING_MASK, +- LAN1_PHY4_LED_MAP ++ LAN0_LED_MAPPING_MASK, ++ LAN0_PHY_LED_MAP(3) + }, + .regmap_size = 2, + }, { +@@ -1677,8 +1658,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN2_LED_MAPPING_MASK, +- LAN2_PHY4_LED_MAP ++ LAN1_LED_MAPPING_MASK, ++ LAN1_PHY_LED_MAP(3) + }, + .regmap_size = 2, + }, { +@@ -1692,8 +1673,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN3_LED_MAPPING_MASK, +- LAN3_PHY4_LED_MAP ++ LAN2_LED_MAPPING_MASK, ++ LAN2_PHY_LED_MAP(3) + }, + .regmap_size = 2, + }, { +@@ -1707,8 +1688,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED0_MAPPING, +- LAN4_LED_MAPPING_MASK, +- LAN4_PHY4_LED_MAP ++ LAN3_LED_MAPPING_MASK, ++ LAN3_PHY_LED_MAP(3) + }, + .regmap_size = 2, + }, +@@ -1726,8 +1707,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN1_LED_MAPPING_MASK, +- LAN1_PHY1_LED_MAP ++ LAN0_LED_MAPPING_MASK, ++ LAN0_PHY_LED_MAP(0) + }, + .regmap_size = 2, + }, { +@@ -1741,8 +1722,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN2_LED_MAPPING_MASK, +- LAN2_PHY1_LED_MAP ++ LAN1_LED_MAPPING_MASK, ++ LAN1_PHY_LED_MAP(0) + }, + .regmap_size = 2, + }, { +@@ -1756,8 +1737,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN3_LED_MAPPING_MASK, +- LAN3_PHY1_LED_MAP ++ LAN2_LED_MAPPING_MASK, ++ LAN2_PHY_LED_MAP(0) + }, + .regmap_size = 2, + }, { +@@ -1771,8 +1752,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN4_LED_MAPPING_MASK, +- LAN4_PHY1_LED_MAP ++ LAN3_LED_MAPPING_MASK, ++ LAN3_PHY_LED_MAP(0) + }, + .regmap_size = 2, + }, +@@ -1790,8 +1771,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN1_LED_MAPPING_MASK, +- LAN1_PHY2_LED_MAP ++ LAN0_LED_MAPPING_MASK, ++ LAN0_PHY_LED_MAP(1) + }, + .regmap_size = 2, + }, { +@@ -1805,8 +1786,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN2_LED_MAPPING_MASK, +- LAN2_PHY2_LED_MAP ++ LAN1_LED_MAPPING_MASK, ++ LAN1_PHY_LED_MAP(1) + }, + .regmap_size = 2, + }, { +@@ -1820,8 +1801,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN3_LED_MAPPING_MASK, +- LAN3_PHY2_LED_MAP ++ LAN2_LED_MAPPING_MASK, ++ LAN2_PHY_LED_MAP(1) + }, + .regmap_size = 2, + }, { +@@ -1835,8 +1816,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN4_LED_MAPPING_MASK, +- LAN4_PHY2_LED_MAP ++ LAN3_LED_MAPPING_MASK, ++ LAN3_PHY_LED_MAP(1) + }, + .regmap_size = 2, + }, +@@ -1854,8 +1835,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN1_LED_MAPPING_MASK, +- LAN1_PHY3_LED_MAP ++ LAN0_LED_MAPPING_MASK, ++ LAN0_PHY_LED_MAP(2) + }, + .regmap_size = 2, + }, { +@@ -1869,8 +1850,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN2_LED_MAPPING_MASK, +- LAN2_PHY3_LED_MAP ++ LAN1_LED_MAPPING_MASK, ++ LAN1_PHY_LED_MAP(2) + }, + .regmap_size = 2, + }, { +@@ -1884,8 +1865,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN3_LED_MAPPING_MASK, +- LAN3_PHY3_LED_MAP ++ LAN2_LED_MAPPING_MASK, ++ LAN2_PHY_LED_MAP(2) + }, + .regmap_size = 2, + }, { +@@ -1899,8 +1880,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN4_LED_MAPPING_MASK, +- LAN4_PHY3_LED_MAP ++ LAN3_LED_MAPPING_MASK, ++ LAN3_PHY_LED_MAP(2) + }, + .regmap_size = 2, + }, +@@ -1918,8 +1899,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN1_LED_MAPPING_MASK, +- LAN1_PHY4_LED_MAP ++ LAN0_LED_MAPPING_MASK, ++ LAN0_PHY_LED_MAP(3) + }, + .regmap_size = 2, + }, { +@@ -1933,8 +1914,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN2_LED_MAPPING_MASK, +- LAN2_PHY4_LED_MAP ++ LAN1_LED_MAPPING_MASK, ++ LAN1_PHY_LED_MAP(3) + }, + .regmap_size = 2, + }, { +@@ -1948,8 +1929,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN3_LED_MAPPING_MASK, +- LAN3_PHY4_LED_MAP ++ LAN2_LED_MAPPING_MASK, ++ LAN2_PHY_LED_MAP(3) + }, + .regmap_size = 2, + }, { +@@ -1963,8 +1944,8 @@ static const struct airoha_pinctrl_func_ + .regmap[1] = { + AIROHA_FUNC_MUX, + REG_LAN_LED1_MAPPING, +- LAN4_LED_MAPPING_MASK, +- LAN4_PHY4_LED_MAP ++ LAN3_LED_MAPPING_MASK, ++ LAN3_PHY_LED_MAP(3) + }, + .regmap_size = 2, + }, diff --git a/target/linux/airoha/patches-6.6/087-v6.17-pinctrl-airoha-Fix-return-value-in-pinconf-callbacks.patch b/target/linux/airoha/patches-6.6/087-v6.17-pinctrl-airoha-Fix-return-value-in-pinconf-callbacks.patch new file mode 100644 index 0000000000..f12b941e74 --- /dev/null +++ b/target/linux/airoha/patches-6.6/087-v6.17-pinctrl-airoha-Fix-return-value-in-pinconf-callbacks.patch @@ -0,0 +1,50 @@ +From 563fcd6475931c5c8c652a4dd548256314cc87ed Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Fri, 22 Aug 2025 14:14:18 +0200 +Subject: [PATCH] pinctrl: airoha: Fix return value in pinconf callbacks + +Pinctrl stack requires ENOTSUPP error code if the parameter is not +supported by the pinctrl driver. Fix the returned error code in pinconf +callbacks if the operation is not supported. + +Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") +Signed-off-by: Lorenzo Bianconi +Link: https://lore.kernel.org/20250822-airoha-pinconf-err-val-fix-v1-1-87b4f264ced2@kernel.org +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/mediatek/pinctrl-airoha.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c ++++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c +@@ -2696,7 +2696,7 @@ static int airoha_pinconf_get(struct pin + arg = 1; + break; + default: +- return -EOPNOTSUPP; ++ return -ENOTSUPP; + } + + *config = pinconf_to_config_packed(param, arg); +@@ -2790,7 +2790,7 @@ static int airoha_pinconf_set(struct pin + break; + } + default: +- return -EOPNOTSUPP; ++ return -ENOTSUPP; + } + } + +@@ -2807,10 +2807,10 @@ static int airoha_pinconf_group_get(stru + if (airoha_pinconf_get(pctrl_dev, + airoha_pinctrl_groups[group].pins[i], + config)) +- return -EOPNOTSUPP; ++ return -ENOTSUPP; + + if (i && cur_config != *config) +- return -EOPNOTSUPP; ++ return -ENOTSUPP; + + cur_config = *config; + } diff --git a/target/linux/airoha/patches-6.6/089-v6.14-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch b/target/linux/airoha/patches-6.6/089-v6.14-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch new file mode 100644 index 0000000000..42873cf004 --- /dev/null +++ b/target/linux/airoha/patches-6.6/089-v6.14-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch @@ -0,0 +1,36 @@ +From 7d0da8f862340c5f42f0062b8560b8d0971a6ac4 Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Tue, 7 Jan 2025 23:26:28 +0100 +Subject: [PATCH] net: airoha: Fix channel configuration for ETS Qdisc + +Limit ETS QoS channel to AIROHA_NUM_QOS_CHANNELS in +airoha_tc_setup_qdisc_ets() in order to align the configured channel to +the value set in airoha_dev_select_queue(). + +Fixes: 20bf7d07c956 ("net: airoha: Add sched ETS offload support") +Signed-off-by: Lorenzo Bianconi +Reviewed-by: Michal Swiatkowski +Link: https://patch.msgid.link/20250107-airoha-ets-fix-chan-v1-1-97f66ed3a068@kernel.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/airoha/airoha_eth.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/airoha/airoha_eth.c ++++ b/drivers/net/ethernet/airoha/airoha_eth.c +@@ -2064,11 +2064,14 @@ static int airoha_qdma_get_tx_ets_stats( + static int airoha_tc_setup_qdisc_ets(struct airoha_gdm_port *port, + struct tc_ets_qopt_offload *opt) + { +- int channel = TC_H_MAJ(opt->handle) >> 16; ++ int channel; + + if (opt->parent == TC_H_ROOT) + return -EINVAL; + ++ channel = TC_H_MAJ(opt->handle) >> 16; ++ channel = channel % AIROHA_NUM_QOS_CHANNELS; ++ + switch (opt->command) { + case TC_ETS_REPLACE: + return airoha_qdma_set_tx_ets_sched(port, channel, opt); diff --git a/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch b/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch deleted file mode 100644 index 21896d7fa9..0000000000 --- a/target/linux/airoha/patches-6.6/113-net-airoha-Fix-channel-configuration-for-ETS-Qdisc.patch +++ /dev/null @@ -1,104 +0,0 @@ -From patchwork Tue Jan 7 22:26:28 2025 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Lorenzo Bianconi -X-Patchwork-Id: 13929634 -X-Patchwork-Delegate: kuba@kernel.org -Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org - [10.30.226.201]) - (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) - by smtp.subspace.kernel.org (Postfix) with ESMTPS id A82271A3035 - for ; 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- dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org - header.b="Gx3FMrdJ" -Received: by smtp.kernel.org (Postfix) with ESMTPSA id E1A57C4CED6; - Tue, 7 Jan 2025 22:27:01 +0000 (UTC) -DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; - s=k20201202; t=1736288822; - bh=/BuvRwLGk+7by7QeOu7n+QgJ5Sk03TO9WCsGbgTs3sE=; - h=From:Date:Subject:To:Cc:From; - b=Gx3FMrdJH+xaen2jSRnu523A40ZOBBFaj896IwBv1PeosUm+eiUCx+K3Qz9CAisX0 - Bj4ohheTiHZDQHZelhKF3ZFTfVQUyYiLiard4x5QdylW2YZA0cpwJe64TMf7CsHbrT - NHCF7nrJPJUwOhDoS/YVdeTw/bb9DlM95aKGSfyH0cy7Kdmjz55No3Im9bCSKcgyaX - Y/lcRZglFjbLyiC3LS06AtM0KOyhUxQKrH+ZWpx5E/sdOEj3SRTJ/I+K8o3m75Kzsn - wKRft5pBwfhGEIrJXrFR4f73QwnxJ6eSUrfjYV8k4mFQpH3nB0hKLi2DpvYPim5dj/ - ADsdcP6QPwokg== -From: Lorenzo Bianconi -Date: Tue, 07 Jan 2025 23:26:28 +0100 -Subject: [PATCH net-next] net: airoha: Fix channel configuration for ETS - Qdisc -Precedence: bulk -X-Mailing-List: netdev@vger.kernel.org -List-Id: -List-Subscribe: -List-Unsubscribe: -MIME-Version: 1.0 -Message-Id: <20250107-airoha-ets-fix-chan-v1-1-97f66ed3a068@kernel.org> -X-B4-Tracking: v=1; b=H4sIABOqfWcC/x2MSwqAMAwFryJZG6ifVvAq4qLUaLNRaUSE0rsbX - Q5v3mQQSkwCY5Uh0c3Cx67Q1BWE6PeNkBdlaE1rTWMG9JyO6JEuwZUf/CSkzobgw+AW14M+z0S - 6/dVpLuUFNrlCSGUAAAA= -X-Change-ID: 20250107-airoha-ets-fix-chan-e35ccac76d64 -To: Felix Fietkau , Sean Wang , - Mark Lee , Andrew Lunn , - "David S. Miller" , Eric Dumazet , - Jakub Kicinski , Paolo Abeni , - Matthias Brugger , - AngeloGioacchino Del Regno -Cc: linux-arm-kernel@lists.infradead.org, - linux-mediatek@lists.infradead.org, netdev@vger.kernel.org, - Lorenzo Bianconi -X-Mailer: b4 0.14.2 -X-Patchwork-Delegate: kuba@kernel.org - -Limit ETS QoS channel to AIROHA_NUM_QOS_CHANNELS in -airoha_tc_setup_qdisc_ets() in order to align the configured channel to -the value set in airoha_dev_select_queue(). - -Fixes: 20bf7d07c956 ("net: airoha: Add sched ETS offload support") -Signed-off-by: Lorenzo Bianconi -Reviewed-by: Michal Swiatkowski ---- - drivers/net/ethernet/mediatek/airoha_eth.c | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - - ---- -base-commit: a1942da8a38717ddd9b4c132f59e1657c85c1432 -change-id: 20250107-airoha-ets-fix-chan-e35ccac76d64 - -Best regards, - ---- a/drivers/net/ethernet/airoha/airoha_eth.c -+++ b/drivers/net/ethernet/airoha/airoha_eth.c -@@ -2064,11 +2064,14 @@ static int airoha_qdma_get_tx_ets_stats( - static int airoha_tc_setup_qdisc_ets(struct airoha_gdm_port *port, - struct tc_ets_qopt_offload *opt) - { -- int channel = TC_H_MAJ(opt->handle) >> 16; -+ int channel; - - if (opt->parent == TC_H_ROOT) - return -EINVAL; - -+ channel = TC_H_MAJ(opt->handle) >> 16; -+ channel = channel % AIROHA_NUM_QOS_CHANNELS; -+ - switch (opt->command) { - case TC_ETS_REPLACE: - return airoha_qdma_set_tx_ets_sched(port, channel, opt);