From: Thomas Richard Date: Tue, 18 Nov 2025 12:33:48 +0000 (+0100) Subject: arm-trusted-firmware-stm32: bump to v2.13 X-Git-Url: http://git.openwrt.org/?a=commitdiff_plain;h=1cbaed41b5f92e0f085ccd55d81ba9e2975cf69b;p=openwrt%2Fstaging%2Fstintel.git arm-trusted-firmware-stm32: bump to v2.13 Since version 4.8.0, OPTEE handles correctly RTC clock configuration for STM32MP15 based boards. So the patch can be dropped. Signed-off-by: Thomas Richard Link: https://github.com/openwrt/openwrt/pull/20953 Signed-off-by: Hauke Mehrtens --- diff --git a/package/boot/arm-trusted-firmware-stm32/Makefile b/package/boot/arm-trusted-firmware-stm32/Makefile index 2d4717adb6..4e2c874928 100644 --- a/package/boot/arm-trusted-firmware-stm32/Makefile +++ b/package/boot/arm-trusted-firmware-stm32/Makefile @@ -7,10 +7,10 @@ include $(TOPDIR)/rules.mk -PKG_VERSION:=2.12 -PKG_RELEASE:=2 +PKG_VERSION:=2.13 +PKG_RELEASE:=1 -PKG_HASH:=b4c047493cac1152203e1ba121ae57267e4899b7bf56eb365e22a933342d31c9 +PKG_HASH:=afb5c408392fcec840bd30de9b02a236b0108142024f9853b542b596b0d894e3 PKG_MAINTAINER:=Thomas Richard include $(INCLUDE_DIR)/kernel.mk diff --git a/package/boot/arm-trusted-firmware-stm32/patches/0001-fix-stm32mp1-fdts-re-enable-RTC-clock.patch b/package/boot/arm-trusted-firmware-stm32/patches/0001-fix-stm32mp1-fdts-re-enable-RTC-clock.patch deleted file mode 100644 index f2ca58ba6a..0000000000 --- a/package/boot/arm-trusted-firmware-stm32/patches/0001-fix-stm32mp1-fdts-re-enable-RTC-clock.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 33573ea6842198cfdb5b3fdd320db9e2045855e9 Mon Sep 17 00:00:00 2001 -From: Valentin Caron -Date: Wed, 11 Dec 2024 11:20:04 +0100 -Subject: [PATCH] fix(stm32mp1-fdts): re-enable RTC clock - -On STM32MP15 ST boards, RTC clock configuration by OPTEE is not ready -yet. Re-enable it temporary to get LSE as clock source of RTC. - -Signed-off-by: Valentin Caron -Change-Id: Ib6071229552e456faffb4fdfc8db9808140d54a7 ---- - fdts/stm32mp157c-ed1.dts | 2 ++ - fdts/stm32mp15xx-dkx.dtsi | 2 ++ - 2 files changed, 4 insertions(+) - ---- a/fdts/stm32mp157c-ed1.dts -+++ b/fdts/stm32mp157c-ed1.dts -@@ -194,6 +194,7 @@ - CLK_MPU_PLL1P - CLK_AXI_PLL2P - CLK_MCU_PLL3P -+ CLK_RTC_LSE - CLK_MCO1_DISABLED - CLK_MCO2_DISABLED - CLK_CKPER_HSE -@@ -242,6 +243,7 @@ - DIV(DIV_APB3, 1) - DIV(DIV_APB4, 1) - DIV(DIV_APB5, 2) -+ DIV(DIV_RTC, 23) - DIV(DIV_MCO1, 0) - DIV(DIV_MCO2, 0) - >; ---- a/fdts/stm32mp15xx-dkx.dtsi -+++ b/fdts/stm32mp15xx-dkx.dtsi -@@ -198,6 +198,7 @@ - CLK_MPU_PLL1P - CLK_AXI_PLL2P - CLK_MCU_PLL3P -+ CLK_RTC_LSE - CLK_MCO1_DISABLED - CLK_MCO2_DISABLED - CLK_CKPER_HSE -@@ -246,6 +247,7 @@ - DIV(DIV_APB3, 1) - DIV(DIV_APB4, 1) - DIV(DIV_APB5, 2) -+ DIV(DIV_RTC, 23) - DIV(DIV_MCO1, 0) - DIV(DIV_MCO2, 0) - >;