From: Daniel Golle Date: Sat, 8 Jul 2023 15:27:25 +0000 (+0100) Subject: mediatek: dts: mt7988a: wire-up mediatek,pio for PHY LEDs X-Git-Tag: v23.05.0-rc3~122 X-Git-Url: http://git.openwrt.org/?a=commitdiff_plain;h=0af05cd32a69b2e92f11e9b8307a1537c7406d34;p=openwrt%2Fstaging%2Fhauke.git mediatek: dts: mt7988a: wire-up mediatek,pio for PHY LEDs The PHY driver needs to read a register containing the values of the bootstrap pins (which happen to be the PHY LEDs) to determine the LED polarities. Allow regmap access to first pinctrl bank by adding the 'syscon' compatible, and reference the pinctrl in the MDIO bus where the PHY driver will look for it. Signed-off-by: Daniel Golle (cherry picked from commit 1f1e0b1144ebaa4ba8b948a12d989a0a6fc9b76f) --- diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts index 98dbf8d691..e204dc4f16 100644 --- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts +++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts @@ -156,6 +156,7 @@ mdio { #address-cells = <1>; #size-cells = <0>; + mediatek,pio = <&pio>; gsw_phy0: ethernet-phy@0 { compatible = "ethernet-phy-id03a2.9481"; diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a.dtsi index 13ad39500d..17de885629 100644 --- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a.dtsi +++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a.dtsi @@ -215,7 +215,7 @@ }; pio: pinctrl@1001f000 { - compatible = "mediatek,mt7988-pinctrl"; + compatible = "mediatek,mt7988-pinctrl", "syscon"; reg = <0 0x1001f000 0 0x1000>, <0 0x11c10000 0 0x1000>, <0 0x11d00000 0 0x1000>,