ti: k3: common: Mark sections for AM65x coherency workaround
authorAndrew F. Davis <[email protected]>
Thu, 25 Apr 2019 17:57:02 +0000 (13:57 -0400)
committerAndrew F. Davis <[email protected]>
Fri, 26 Apr 2019 15:52:25 +0000 (11:52 -0400)
These sections of code are only needed for the coherency workaround
used for AM65x, if this workaround is not needed then this code
is not either. Mark it off to keep it separated from the rest of
the PSCI implementation.

Signed-off-by: Andrew F. Davis <[email protected]>
Change-Id: I113ca6a2a1f7881814ab0a64e5bac57139bc03ef

plat/ti/k3/common/k3_psci.c

index cd42e7a0afd49c1493e9ba777ab82c023b6c980d..c7754e994186114fbacfe1df031e7dc1f61698f2 100644 (file)
 #include <k3_gicv3.h>
 #include <ti_sci.h>
 
+#ifdef TI_AM65X_WORKAROUND
 /* Need to flush psci internal locks before shutdown or their values are lost */
 #include "../../../../lib/psci/psci_private.h"
+#endif
 
 uintptr_t k3_sec_entrypoint;
 
@@ -113,6 +115,7 @@ void k3_pwr_domain_on_finish(const psci_power_state_t *target_state)
        k3_gic_cpuif_enable();
 }
 
+#ifdef TI_AM65X_WORKAROUND
 static void  __dead2 k3_pwr_domain_pwr_down_wfi(const psci_power_state_t
                                                  *target_state)
 {
@@ -120,6 +123,7 @@ static void  __dead2 k3_pwr_domain_pwr_down_wfi(const psci_power_state_t
        flush_dcache_range((uintptr_t) psci_locks, sizeof(psci_locks));
        psci_power_down_wfi();
 }
+#endif
 
 static void __dead2 k3_system_reset(void)
 {
@@ -150,7 +154,9 @@ static const plat_psci_ops_t k3_plat_psci_ops = {
        .pwr_domain_on = k3_pwr_domain_on,
        .pwr_domain_off = k3_pwr_domain_off,
        .pwr_domain_on_finish = k3_pwr_domain_on_finish,
+#ifdef TI_AM65X_WORKAROUND
        .pwr_domain_pwr_down_wfi = k3_pwr_domain_pwr_down_wfi,
+#endif
        .system_reset = k3_system_reset,
        .validate_power_state = k3_validate_power_state,
        .validate_ns_entrypoint = k3_validate_ns_entrypoint