Some Realtek SoCs such as the RTL931X store MIB counters in tables rather
than registers. Unlike register reads, table access requires programming
the table control register, setting the command field to determine read or
write, and then polling for completion. This makes it necessary to
implement a separate path for table-based statistics.
Like register-based MIBs, the table-based MIBs also come in two types: STD
and PRIV which will require slightly different implementations.
Signed-off-by: Sharadanand Karanjkar <[email protected]>
Signed-off-by: Sven Eckelmann <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/20631
Signed-off-by: Hauke Mehrtens <[email protected]>
reg = priv->r->stat_port_prv_mib;
reg_offset = 128;
break;
+ case MIB_TBL_STD:
+ case MIB_TBL_PRV:
+ if (!priv->r->stat_port_table_read)
+ return false;
+
+ *data = priv->r->stat_port_table_read(port, mib_item->size, mib_item->offset,
+ mib_item->reg == MIB_TBL_PRV);
+
+ return true;
default:
return false;
}
int stat_rst;
int stat_port_std_mib;
int stat_port_prv_mib;
+ u64 (*stat_port_table_read)(int port, unsigned int mib_size, unsigned int offset, bool is_pvt);
int (*port_iso_ctrl)(int p);
void (*traffic_enable)(int source, int dest);
void (*traffic_disable)(int source, int dest);
enum mib_reg {
MIB_REG_INVALID = 0,
MIB_REG_STD,
- MIB_REG_PRV
+ MIB_REG_PRV,
+ MIB_TBL_STD,
+ MIB_TBL_PRV,
};
#define MIB_ITEM(_reg, _offset, _size) \