ARM: zynq: Wire SPL configuration for cse nor/nand targets

These symlinks are here only for testing purpose where SPL is used
for soc configuration.

Signed-off-by: Michal Simek <[email protected]>

diff --git a/board/xilinx/zynq/zynq-cse-nand b/board/xilinx/zynq/zynq-cse-nand
new file mode 120000 (symlink)
index 0000000..9d89a99
--- /dev/null
+++ b/board/xilinx/zynq/zynq-cse-nand
@@ -0,0 +1 @@
+zynq-zc770-xm011
\ No newline at end of file

diff --git a/board/xilinx/zynq/zynq-cse-nor b/board/xilinx/zynq/zynq-cse-nor
new file mode 120000 (symlink)
index 0000000..bb80693
--- /dev/null
+++ b/board/xilinx/zynq/zynq-cse-nor
@@ -0,0 +1 @@
+zynq-zc770-xm012
\ No newline at end of file