MIPS: io: Prevent compiler reordering writeX()

writeX() has strong ordering semantics with respect to memory updates.
In the absence of a write barrier or a compiler barrier, the compiler
can reorder register and memory update instructions. This breaks the
writeX() API.

Signed-off-by: Sinan Kaya <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/18997/
[[email protected]: Tidy commit message]
Signed-off-by: James Hogan <[email protected]>

diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 0cbf3af37ecad9d195847c49ddffb15a6165fc4d..fd00ddafb425e2f8529ed15a6b2c9c69c6e8ad09 100644 (file)
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -307,7 +307,7 @@ static inline void iounmap(const volatile void __iomem *addr)
 #if defined(CONFIG_CPU_CAVIUM_OCTEON) || defined(CONFIG_LOONGSON3_ENHANCEMENT)
 #define war_io_reorder_wmb()           wmb()
 #else
-#define war_io_reorder_wmb()           do { } while (0)
+#define war_io_reorder_wmb()           barrier()
 #endif
 
 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq)                    \