perf tools: Fix perf regs mask generation

On some architectures (powerpc in particular), the number of registers
exceeds what can be represented in an integer bitmask. Ensure we
generate the proper bitmask on such platforms.

Fixes: 71ad0f5e4 ("perf tools: Support for DWARF CFI unwinding on post processing")
Signed-off-by: Naveen N. Rao <[email protected]>
Acked-by: Arnaldo Carvalho de Melo <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>

diff --git a/tools/perf/util/perf_regs.c b/tools/perf/util/perf_regs.c
index 6b8eb13e14e4d5897fca71c41634a07cc9ec5d16..c4023f22f287dd7fb6cdf4a395af2f0d631665fb 100644 (file)
--- a/tools/perf/util/perf_regs.c
+++ b/tools/perf/util/perf_regs.c
@@ -12,18 +12,18 @@ int perf_reg_value(u64 *valp, struct regs_dump *regs, int id)
        int i, idx = 0;
        u64 mask = regs->mask;
 
-       if (regs->cache_mask & (1 << id))
+       if (regs->cache_mask & (1ULL << id))
                goto out;
 
-       if (!(mask & (1 << id)))
+       if (!(mask & (1ULL << id)))
                return -EINVAL;
 
        for (i = 0; i < id; i++) {
-               if (mask & (1 << i))
+               if (mask & (1ULL << i))
                        idx++;
        }
 
-       regs->cache_mask |= (1 << id);
+       regs->cache_mask |= (1ULL << id);
        regs->cache_regs[id] = regs->regs[idx];
 
 out: