// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
+#include <dt-bindings/pinctrl/mt65xx.h>
+
#include "mt7622-buffalo-wsr.dtsi"
/ {
"NALE", "NDL0", "NDL1",
"NDL2", "NDL3";
input-enable;
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up;
};
};
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
+#include <dt-bindings/pinctrl/mt65xx.h>
+
#include "mt7622-buffalo-wsr.dtsi"
/ {
pins = "SPI_WP", "SPI_HOLD", "SPI_MOSI",
"SPI_MISO", "SPI_CS";
input-enable;
- drive-strength = <16>;
+ drive-strength = <MTK_DRIVE_16mA>;
bias-pull-up;
};
conf-clk {
pins = "SPI_CLK";
- drive-strength = <16>;
+ drive-strength = <MTK_DRIVE_16mA>;
bias-pull-down;
};
};
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
"NDL3", "NDL4", "NDL5",
"NDL6", "NDL7", "NRB";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up;
};
conf-clk {
pins = "NCLE";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-down;
};
};
conf {
pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
"I2S_WS", "I2S_MCLK";
- drive-strength = <12>;
+ drive-strength = <MTK_DRIVE_12mA>;
bias-pull-down;
};
};
pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
"I2S2_IN","I2S4_OUT";
input-enable;
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up;
};
conf-clk {
pins = "I2S3_OUT";
- drive-strength = <12>;
+ drive-strength = <MTK_DRIVE_12mA>;
bias-pull-down;
};
conf-cd {
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
conf-cmd-data {
pins = "SPI_WP", "SPI_HOLD", "SPI_MOSI",
"SPI_MISO", "SPI_CS";
- drive-strength = <16>;
+ drive-strength = <MTK_DRIVE_16mA>;
bias-pull-up;
};
conf-clk {
pins = "SPI_CLK";
- drive-strength = <16>;
+ drive-strength = <MTK_DRIVE_16mA>;
bias-pull-down;
};
};
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
"NDL3", "NDL4", "NDL5",
"NDL6", "NDL7", "NRB";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up;
};
conf-clk {
pins = "NCLE";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-down;
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <103>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <103>;
};
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable;
};
};
wwan_rst_h: wwan-rst-h {
pins = "GPIO_WPS";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable;
output-low;
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
- drive-strength = <6>;
+ drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
- drive-strength = <6>;
+ drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
&pio {
en8811_pwr_a: en8811-pwr-a {
pins = "GPIO_11";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
output-low;
};
en8811_pwr_b: en8811-pwr-b {
pins = "GPIO_12";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
output-low;
};
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-clk {
pins = "EMMC_CK";
- drive-strength = <6>;
+ drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
conf-ds {
};
conf-rst {
pins = "EMMC_RSTB";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
};
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-clk {
pins = "EMMC_CK";
- drive-strength = <6>;
+ drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
conf-ds {
};
conf-rst {
pins = "EMMC_RSTB";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable;
};
};
usb_ngff_pins: usb-ngff-pins {
ngff-gnss-off {
pins = "GPIO_6";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
ngff-pe-rst {
pins = "GPIO_7";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
ngff-wwan-off {
pins = "GPIO_8";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
ngff-pwr-off {
pins = "GPIO_9";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
ngff-rst {
pins = "GPIO_10";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
ngff-coex {
pins = "SPI1_CS";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB8",
"WF1_TOP_CLK",
"WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
- drive-strength = <6>;
+ drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
};
conf-rst {
pins = "EMMC_RSTB";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
- drive-strength = <6>;
+ drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
};
conf-rst {
pins = "EMMC_RSTB";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-clk {
pins = "EMMC_CK";
- drive-strength = <6>;
+ drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
conf-ds {
};
conf-rst {
pins = "EMMC_RSTB";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
};
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-clk {
pins = "EMMC_CK";
- drive-strength = <6>;
+ drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
conf-ds {
};
conf-rst {
pins = "EMMC_RSTB";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
- drive-strength = <6>;
+ drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
};
conf-rst {
pins = "EMMC_RSTB";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
- drive-strength = <6>;
+ drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
};
conf-rst {
pins = "EMMC_RSTB";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
pins = "WF1_HB1", "WF1_HB2", "WF1_HB3", "WF1_HB4",
"WF1_HB0", "WF1_HB5", "WF1_HB6", "WF1_HB7",
"WF1_HB8", "WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
sfp_i2c_pins: sfp-i2c-pins {
conf-scl {
pins = "LED_A";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-sda {
pins = "LED_E";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable;
};
};
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
- drive-strength = <6>;
+ drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
};
conf-rst {
pins = "EMMC_RSTB";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
- drive-strength = <6>;
+ drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
};
conf-rst {
pins = "EMMC_RSTB";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
- drive-strength = <8>;
+ drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
- drive-strength = <4>;
+ drive-strength = <MTK_DRIVE_4mA>;
};
};
};
+ "WF_HB7", "WF_HB8", "WF_HB9", "WF_HB10",
+ "WF_TOP_CLK", "WF_TOP_DATA", "WF_XO_REQ",
+ "WF_CBA_RESETB", "WF_DIG_RESETB";
-+ drive-strength = <4>;
++ drive-strength = <MTK_DRIVE_4mA>;
+ };
+ };
+