arm: vf610: zii devel b: Add support for switch interrupts
authorAndrew Lunn <[email protected]>
Sun, 16 Oct 2016 17:56:53 +0000 (19:56 +0200)
committerDavid S. Miller <[email protected]>
Mon, 17 Oct 2016 15:18:09 +0000 (11:18 -0400)
The Switches use GPIO lines to indicate interrupts from two of the
switches.

With these interrupts in place, we can make use of the interrupt
controllers within the switch to indicate when the internal PHYs
generate an interrupt. Use standard PHY properties to do this.

Signed-off-by: Andrew Lunn <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts

index 5c1fcab4a6f78d9f340f67b1805427933cea5ad6..1552db00cc592e0a17465c702b74428310b343b0 100644 (file)
 
                        switch0: switch0@0 {
                                compatible = "marvell,mv88e6085";
+                               pinctrl-0 = <&pinctrl_gpio_switch0>;
+                               pinctrl-names = "default";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                reg = <0>;
                                dsa,member = <0 0>;
+                               interrupt-parent = <&gpio0>;
+                               interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
 
                                ports {
                                        #address-cells = <1>;
                                        port@0 {
                                                reg = <0>;
                                                label = "lan0";
+                                               phy-handle = <&switch0phy0>;
                                        };
 
                                        port@1 {
                                                reg = <1>;
                                                label = "lan1";
+                                               phy-handle = <&switch0phy1>;
                                        };
 
                                        port@2 {
                                                reg = <2>;
                                                label = "lan2";
+                                               phy-handle = <&switch0phy2>;
                                        };
 
                                        switch0port5: port@5 {
                                                };
                                        };
                                };
+                               mdio {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       switch0phy0: switch0phy0@0 {
+                                               reg = <0>;
+                                               interrupt-parent = <&switch0>;
+                                               interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+                                       };
+                                       switch0phy1: switch1phy0@1 {
+                                               reg = <1>;
+                                               interrupt-parent = <&switch0>;
+                                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;                                   };
+                                       switch0phy2: switch1phy0@2 {
+                                               reg = <2>;
+                                               interrupt-parent = <&switch0>;
+                                               interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+                                       };
+                               };
                        };
                };
 
 
                        switch1: switch1@0 {
                                compatible = "marvell,mv88e6085";
+                               pinctrl-0 = <&pinctrl_gpio_switch1>;
+                               pinctrl-names = "default";
                                #address-cells = <1>;
                                #size-cells = <0>;
                                reg = <0>;
                                dsa,member = <0 1>;
+                               interrupt-parent = <&gpio0>;
+                               interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
 
                                ports {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                        switch1phy0: switch1phy0@0 {
                                                reg = <0>;
+                                               interrupt-parent = <&switch1>;
+                                               interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
                                        };
                                        switch1phy1: switch1phy0@1 {
                                                reg = <1>;
+                                               interrupt-parent = <&switch1>;
+                                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
                                        };
                                        switch1phy2: switch1phy0@2 {
                                                reg = <2>;
+                                               interrupt-parent = <&switch1>;
+                                               interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
                                        };
                                };
                        };
                >;
        };
 
+       pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
+               fsl,pins = <
+                       VF610_PAD_PTB5__GPIO_27         0x219d
+               >;
+       };
+
+       pinctrl_gpio_switch1: pinctrl-gpio-switch1 {
+               fsl,pins = <
+                       VF610_PAD_PTB4__GPIO_26         0x219d
+               >;
+       };
+
        pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset {
                fsl,pins = <
                         VF610_PAD_PTE14__GPIO_119      0x31c2