ssb: fix ssb clock rate according to broadcom source

This fix was done according to si_clock_rate function in broadcom siutils.c

Signed-off-by: Hauke Mehrtens <[email protected]>
Signed-off-by: John W. Linville <[email protected]>

diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index e568664f8b9c9ba2f673dc75be42a41e61965c3b..57b7b6460896a271d972ac4b998693901bac6a9a 100644 (file)
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -1002,8 +1002,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
        switch (plltype) {
        case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
                if (m & SSB_CHIPCO_CLK_T6_MMASK)
-                       return SSB_CHIPCO_CLK_T6_M0;
-               return SSB_CHIPCO_CLK_T6_M1;
+                       return SSB_CHIPCO_CLK_T6_M1;
+               return SSB_CHIPCO_CLK_T6_M0;
        case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
        case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
        case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */