drm: add LG eDP panel to quirk database

The N value was computed by kernel driver that based on synchronous clock
mode. But only specific N value (0x8000) would be acceptable for
LG LP140WF6-SPM1 eDP panel which is running at asynchronous clock mode.
With the other N value, Tcon will enter BITS mode and display black screen.
Add this panel into quirk database and give particular N value when
calculate M/N divider.

v2: no update
v3: add lost commit messages back for version 2
v4: send patch to both intel-gfx and dri-devel

Cc: Jani Nikula <[email protected]>
Cc: Cooper Chiou <[email protected]>
Cc: Matt Atwood <[email protected]>
Cc: Maarten Lankhorst <[email protected]>
Cc: Dhinakaran Pandiyan <[email protected]>
Cc: Clint Taylor <[email protected]>
Signed-off-by: Lee, Shawn C <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index c1fe1713eaefcce7e1c7c5151679559397bdc19f..37c01b6076ec42abf14a34128eb4409649d399e7 100644 (file)
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -1271,6 +1271,8 @@ struct dpcd_quirk {
 static const struct dpcd_quirk dpcd_quirk_list[] = {
        /* Analogix 7737 needs reduced M and N at HBR2 link rates */
        { OUI(0x00, 0x22, 0xb9), DEVICE_ID_ANY, true, BIT(DP_DPCD_QUIRK_CONSTANT_N) },
+       /* LG LP140WF6-SPM1 eDP panel */
+       { OUI(0x00, 0x22, 0xb9), DEVICE_ID('s', 'i', 'v', 'a', 'r', 'T'), false, BIT(DP_DPCD_QUIRK_CONSTANT_N) },
 };
 
 #undef OUI