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drm/i915/guc: Disable rpm wakeref asserts in GuC irq handler
author
Michał Winiarski
<
[email protected]
>
Sat, 14 Jul 2018 17:37:03 +0000
(18:37 +0100)
committer
Chris Wilson
<
[email protected]
>
Sat, 14 Jul 2018 18:21:20 +0000
(19:21 +0100)
We're seeing "RPM wakelock ref not held during HW access" warning
otherwise. Since IRQs are synced for runtime suspend we can just disable
the wakeref asserts.
Reported-by: Marta Löfstedt <
[email protected]
>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105710
Signed-off-by: Michał Winiarski <
[email protected]
>
Cc: Chris Wilson <
[email protected]
>
Cc: Michal Wajdeczko <
[email protected]
>
Link:
https://patchwork.freedesktop.org/patch/msgid/
[email protected]
Reviewed-by: Chris Wilson <
[email protected]
>
Signed-off-by: Chris Wilson <
[email protected]
>
drivers/gpu/drm/i915/intel_guc.c
patch
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diff --git
a/drivers/gpu/drm/i915/intel_guc.c
b/drivers/gpu/drm/i915/intel_guc.c
index e12bd259df1720f0ad684b6d25f809a029931c88..560c7406ae406e5df1d2b083024ea7ae983db4e8 100644
(file)
--- a/
drivers/gpu/drm/i915/intel_guc.c
+++ b/
drivers/gpu/drm/i915/intel_guc.c
@@
-466,11
+466,13
@@
void intel_guc_to_host_event_handler_mmio(struct intel_guc *guc)
* could happen that GuC sets the bit for 2nd interrupt but Host
* clears out the bit on handling the 1st interrupt.
*/
+ disable_rpm_wakeref_asserts(dev_priv);
spin_lock(&guc->irq_lock);
val = I915_READ(SOFT_SCRATCH(15));
msg = val & guc->msg_enabled_mask;
I915_WRITE(SOFT_SCRATCH(15), val & ~msg);
spin_unlock(&guc->irq_lock);
+ enable_rpm_wakeref_asserts(dev_priv);
intel_guc_to_host_process_recv_msg(guc, msg);
}