[ARM] 4791/1: S3C2412: Make fclk a parent of msysclk

In the S3C2412 fclk is derived from msysclk, not straight from
the MPLL output. Set clk_f.parent appropriately.

Signed-off-by: Ben Dooks <[email protected]>
Signed-off-by: Russell King <[email protected]>

diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index 0f752500cd5ba6b5d391e0ae677718d17c293c2a..2697a65ba7271bcb58d80aeb24e2550872350979 100644 (file)
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -684,6 +684,8 @@ int __init s3c2412_baseclk_add(void)
        clk_usb_bus.parent = &clk_usbsrc;
        clk_usb_bus.rate = 0x0;
 
+       clk_f.parent = &clk_msysclk;
+
        s3c2412_clk_initparents();
 
        for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) {