radeon: Fix KMS CP writeback on big endian machines.
authorMichel Dänzer <[email protected]>
Thu, 7 Apr 2011 14:17:47 +0000 (16:17 +0200)
committerDave Airlie <[email protected]>
Sat, 9 Apr 2011 06:20:15 +0000 (16:20 +1000)
This is necessary even with PCI(e) GART, and it makes writeback work even with
AGP on my PowerBook. Might still be unreliable with older revisions of UniNorth
and other AGP bridges though.

Signed-off-by: Michel Dänzer <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
drivers/gpu/drm/radeon/radeon_fence.c
drivers/gpu/drm/radeon/radeon_ring.c

index 9e59868d354e4a83e6f06d40663171416151a1f5..bbcd1dd7bac0eb27057f44b39add48528f701ffd 100644 (file)
@@ -79,7 +79,7 @@ static bool radeon_fence_poll_locked(struct radeon_device *rdev)
                        scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
                else
                        scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
-               seq = rdev->wb.wb[scratch_index/4];
+               seq = le32_to_cpu(rdev->wb.wb[scratch_index/4]);
        } else
                seq = RREG32(rdev->fence_drv.scratch_reg);
        if (seq != rdev->fence_drv.last_seq) {
index bbc9cd8233346e1a65df6657c324e1c7313f1678..c6776e48fdde44d678880a1af436866cb24c8740 100644 (file)
@@ -248,7 +248,7 @@ void radeon_ib_pool_fini(struct radeon_device *rdev)
 void radeon_ring_free_size(struct radeon_device *rdev)
 {
        if (rdev->wb.enabled)
-               rdev->cp.rptr = rdev->wb.wb[RADEON_WB_CP_RPTR_OFFSET/4];
+               rdev->cp.rptr = le32_to_cpu(rdev->wb.wb[RADEON_WB_CP_RPTR_OFFSET/4]);
        else {
                if (rdev->family >= CHIP_R600)
                        rdev->cp.rptr = RREG32(R600_CP_RB_RPTR);