drm/radeon: use ALIGN instead of open coding it

Cc: Jerome Glisse <[email protected]>
Cc: Alex Deucher <[email protected]>
Signed-off-by: Matt Turner <[email protected]>
Reviewed-by: Corbin Simpson <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>

diff --git a/drivers/gpu/drm/radeon/r600_blit.c b/drivers/gpu/drm/radeon/r600_blit.c
index 5ea432347589a77c81181719294da4c6da5bba5e..f4fb88ece2bbc0221e9a967518a94745fb545be6 100644 (file)
--- a/drivers/gpu/drm/radeon/r600_blit.c
+++ b/drivers/gpu/drm/radeon/r600_blit.c
@@ -49,7 +49,7 @@ set_render_target(drm_radeon_private_t *dev_priv, int format, int w, int h, u64
        RING_LOCALS;
        DRM_DEBUG("\n");
 
-       h = (h + 7) & ~7;
+       h = ALIGN(h, 8);
        if (h < 8)
                h = 8;
 

diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c
index de8bbbcfe117177537ea92d2a55c6510fdcf7cf6..f6c6c77db7e004278d549f0c60f9a36cbd627094 100644 (file)
--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -25,7 +25,7 @@ set_render_target(struct radeon_device *rdev, int format,
        u32 cb_color_info;
        int pitch, slice;
 
-       h = (h + 7) & ~7;
+       h = ALIGN(h, 8);
        if (h < 8)
                h = 8;
 
@@ -396,7 +396,7 @@ set_default_state(struct radeon_device *rdev)
                                    NUM_ES_STACK_ENTRIES(num_es_stack_entries));
 
        /* emit an IB pointing at default state */
-       dwords = (rdev->r600_blit.state_len + 0xf) & ~0xf;
+       dwords = ALIGN(rdev->r600_blit.state_len, 0x10);
        gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.state_offset;
        radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2));
        radeon_ring_write(rdev, gpu_addr & 0xFFFFFFFC);