rcar_gen3: drivers: qos: change subslot cycle

Subslot cycle from 132 to 126 as default setting.
Subslot cycle from 264 to 252.

 [IPL/QoS]
 - Update H3 Ver.2.0 QoS setting rev.0.21.
 - Update H3 Ver.3.0 QoS setting rev.0.11.
 - Update M3 Ver.1.1 QoS setting rev.0.19.
 - Update M3 Ver.3.0 QoS setting rev.0.02.
 - Update M3N Ver.1.1 QoS setting rev.0.09.

Signed-off-by: Yoshifumi Hosoya <[email protected]>
Change-Id: I52b1bf880163ce03065dc8933d7f193e45cfd9a5

diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
index c4f8701cdf68b65dec152b7b5dcedcc31e60a1e6..c7137de55716b2471ac8e8847df791e1a54d5f0e 100644 (file)
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -13,7 +13,7 @@
 #include "qos_init_h3_v20.h"
 
 
-#define        RCAR_QOS_VERSION                "rev.0.20"
+#define        RCAR_QOS_VERSION                "rev.0.21"
 
 #define QOSWT_TIME_BANK0                               (20000000U)     /* unit:ns */
 

diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
index 95f4810f624b9f475339e39068ec61acae317795..ffc9025c2277faa35928f1876357a7b026a229ae 100644 (file)
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2018-2019, Renesas Electronics Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -13,7 +13,7 @@
 #include "qos_init_h3_v30.h"
 
 
-#define        RCAR_QOS_VERSION                "rev.0.10"
+#define        RCAR_QOS_VERSION                "rev.0.11"
 
 #define QOSCTRL_FSS                    (QOS_BASE1 + 0x0048U)
 

diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
index 71e0396280d8c08cc13d27b9d622c6dc535db04f..6503b436c5747685e7fd1420599bcacb42769dee 100644 (file)
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2018-2019, Renesas Electronics Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -13,7 +13,7 @@
 #include "qos_init_h3n_v30.h"
 
 
-#define        RCAR_QOS_VERSION                "rev.0.06"
+#define        RCAR_QOS_VERSION                "rev.0.07"
 
 #define QOSCTRL_FSS                    (QOS_BASE1 + 0x0048U)
 

diff --git a/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v11.c b/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v11.c
index 10fa6b4e2f24adcd42556e3e9c475c5e69b3d4c4..cee9dd0c919595694fce0f090e03b50cb7fcd93a 100644 (file)
--- a/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v11.c
+++ b/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v11.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2018, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2017-2019, Renesas Electronics Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -12,7 +12,7 @@
 #include "../qos_reg.h"
 #include "qos_init_m3_v11.h"
 
-#define        RCAR_QOS_VERSION                "rev.0.18"
+#define        RCAR_QOS_VERSION                "rev.0.19"
 
 
 #define QOSWT_TIME_BANK0                               (20000000U)     /* unit:ns */

diff --git a/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v30.c b/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v30.c
index 319e3934e95b2b1a1c71298a61816a7886085325..e5a31c482165de7bbed12cbc79ec996deb8a17cc 100644 (file)
--- a/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v30.c
+++ b/drivers/staging/renesas/rcar/qos/M3/qos_init_m3_v30.c
@@ -12,7 +12,7 @@
 #include "../qos_reg.h"
 #include "qos_init_m3_v30.h"
 
-#define        RCAR_QOS_VERSION                "rev.0.1"
+#define        RCAR_QOS_VERSION                "rev.0.02"
 
 #define QOSCTRL_EARLYR                 (QOS_BASE1 + 0x0060U)
 #define QOSCTRL_FSS                    (QOS_BASE1 + 0x0048U)

diff --git a/drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c b/drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c
index 52a3ca2cef262c9010a6c3e100264e8e960f64cb..bd023e2de76330c58248714cea50f8c130619b92 100644 (file)
--- a/drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c
+++ b/drivers/staging/renesas/rcar/qos/M3N/qos_init_m3n_v10.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2018, Renesas Electronics Corporation. All rights reserved.
+ * Copyright (c) 2017-2019, Renesas Electronics Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -12,7 +12,7 @@
 #include "../qos_reg.h"
 #include "qos_init_m3n_v10.h"
 
-#define        RCAR_QOS_VERSION                "rev.0.08"
+#define        RCAR_QOS_VERSION                "rev.0.09"
 
 #define QOSCTRL_EARLYR                 (QOS_BASE1 + 0x0060U)
 #define QOSCTRL_FSS                    (QOS_BASE1 + 0x0048U)

diff --git a/drivers/staging/renesas/rcar/qos/qos_common.h b/drivers/staging/renesas/rcar/qos/qos_common.h
index 89dcf06d68ccaad6ad884a99df46f9b5eb7456ac..c3a83ac6ff9c31f7f7e8fa27401923e1197380b8 100644 (file)
--- a/drivers/staging/renesas/rcar/qos/qos_common.h
+++ b/drivers/staging/renesas/rcar/qos/qos_common.h
@@ -34,9 +34,9 @@
 #if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3N)
 /* define used for M3N */
 #if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 1.95usec */
-#define SUB_SLOT_CYCLE_M3N             (0x84U) /* 132 */
+#define SUB_SLOT_CYCLE_M3N             (0x7EU) /* 126 */
 #else /* REF 3.9usec */
-#define SUB_SLOT_CYCLE_M3N             (0x108U)        /* 264 */
+#define SUB_SLOT_CYCLE_M3N             (0xFCU) /* 252 */
 #endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */
 
 #define SL_INIT_SSLOTCLK_M3N           (SUB_SLOT_CYCLE_M3N -1U)
@@ -46,9 +46,9 @@
 #if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_H3)
 /* define used for H3 */
 #if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 1.95usec */
-#define SUB_SLOT_CYCLE_H3_20           (0x84U) /* 132 */
+#define SUB_SLOT_CYCLE_H3_20           (0x7EU) /* 126 */
 #else /* REF 3.9usec */
-#define SUB_SLOT_CYCLE_H3_20           (0x108U)        /* 264 */
+#define SUB_SLOT_CYCLE_H3_20           (0xFCU) /* 252 */
 #endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */
 
 #define SL_INIT_SSLOTCLK_H3_20         (SUB_SLOT_CYCLE_H3_20 -1U)
@@ -64,9 +64,9 @@
 #if (RCAR_LSI == RCAR_H3N)
 /* define used for H3N */
 #if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 1.95usec */
-#define SUB_SLOT_CYCLE_H3N             (0x84U) /* 132 */
+#define SUB_SLOT_CYCLE_H3N             (0x7EU) /* 126 */
 #else /* REF 3.9usec */
-#define SUB_SLOT_CYCLE_H3N             (0x108U)        /* 264 */
+#define SUB_SLOT_CYCLE_H3N             (0xFCU) /* 252 */
 #endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */
 
 #define SL_INIT_SSLOTCLK_H3N           (SUB_SLOT_CYCLE_H3N -1U)
@@ -77,11 +77,11 @@
 #if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3)
 /* define used for M3 */
 #if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 1.95usec */
-#define SUB_SLOT_CYCLE_M3_11           (0x84U) /* 132 */
-#define SUB_SLOT_CYCLE_M3_30           (0x84U) /* 132 */
+#define SUB_SLOT_CYCLE_M3_11           (0x7EU) /* 126 */
+#define SUB_SLOT_CYCLE_M3_30           (0x7EU) /* 126 */
 #else /* REF 3.9usec */
-#define SUB_SLOT_CYCLE_M3_11           (0x108U)        /* 264 */
-#define SUB_SLOT_CYCLE_M3_30           (0x108U)        /* 264 */
+#define SUB_SLOT_CYCLE_M3_11           (0xFCU) /* 252 */
+#define SUB_SLOT_CYCLE_M3_30           (0xFCU) /* 252 */
 #endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */
 
 #define SL_INIT_SSLOTCLK_M3_11         (SUB_SLOT_CYCLE_M3_11 -1U)