+++ /dev/null
-From 144230e5840c09984ad743c3df9de5fb443159a9 Mon Sep 17 00:00:00 2001
-Date: Mon, 10 Feb 2025 15:01:18 +0800
-Subject: [PATCH] arm64: dts: qcom: ipq6018: add 1.2GHz CPU Frequency
-
-The final version of IPQ6000 (SoC id: IPQ6000, SBL version:
-BOOT.XF.0.3-00086-IPQ60xxLZB-1) has a max design frequency
-of 1.2GHz, so add this CPU frequency.
-
----
- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -119,6 +119,13 @@
- clock-latency-ns = <200000>;
- };
-
-+ opp-1200000000 {
-+ opp-hz = /bits/ 64 <1200000000>;
-+ opp-microvolt = <850000>;
-+ opp-supported-hw = <0x4>;
-+ clock-latency-ns = <200000>;
-+ };
-+
- opp-1320000000 {
- opp-hz = /bits/ 64 <1320000000>;
- opp-microvolt = <862500>;
--- /dev/null
+From 144230e5840c09984ad743c3df9de5fb443159a9 Mon Sep 17 00:00:00 2001
+Date: Mon, 10 Feb 2025 15:01:18 +0800
+Subject: [PATCH] arm64: dts: qcom: ipq6018: add 1.2GHz CPU Frequency
+
+The final version of IPQ6000 (SoC id: IPQ6000, SBL version:
+BOOT.XF.0.3-00086-IPQ60xxLZB-1) has a max design frequency
+of 1.2GHz, so add this CPU frequency.
+
+---
+ arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+@@ -119,6 +119,13 @@
+ clock-latency-ns = <200000>;
+ };
+
++ opp-1200000000 {
++ opp-hz = /bits/ 64 <1200000000>;
++ opp-microvolt = <850000>;
++ opp-supported-hw = <0x4>;
++ clock-latency-ns = <200000>;
++ };
++
+ opp-1320000000 {
+ opp-hz = /bits/ 64 <1320000000>;
+ opp-microvolt = <862500>;
+++ /dev/null
-From a96e765a7b3f64429f7eec3471a2093355ab041e Mon Sep 17 00:00:00 2001
-Date: Mon, 10 Feb 2025 15:01:19 +0800
-Subject: [PATCH] arm64: dts: qcom: ipq6018: add 1.5GHz CPU Frequency
-
-The early version of IPQ6000 (SoC id: IPQ6018, SBL version:
-BOOT.XF.0.3-00077-IPQ60xxLZB-2) and IPQ6005 SoCs can reach
-a max frequency of 1.5GHz, so add this CPU frequency.
-
----
- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -140,6 +140,13 @@
- clock-latency-ns = <200000>;
- };
-
-+ opp-1512000000 {
-+ opp-hz = /bits/ 64 <1512000000>;
-+ opp-microvolt = <937500>;
-+ opp-supported-hw = <0x2>;
-+ clock-latency-ns = <200000>;
-+ };
-+
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <987500>;
--- /dev/null
+From a96e765a7b3f64429f7eec3471a2093355ab041e Mon Sep 17 00:00:00 2001
+Date: Mon, 10 Feb 2025 15:01:19 +0800
+Subject: [PATCH] arm64: dts: qcom: ipq6018: add 1.5GHz CPU Frequency
+
+The early version of IPQ6000 (SoC id: IPQ6018, SBL version:
+BOOT.XF.0.3-00077-IPQ60xxLZB-2) and IPQ6005 SoCs can reach
+a max frequency of 1.5GHz, so add this CPU frequency.
+
+---
+ arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+@@ -140,6 +140,13 @@
+ clock-latency-ns = <200000>;
+ };
+
++ opp-1512000000 {
++ opp-hz = /bits/ 64 <1512000000>;
++ opp-microvolt = <937500>;
++ opp-supported-hw = <0x2>;
++ clock-latency-ns = <200000>;
++ };
++
+ opp-1608000000 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <987500>;
+++ /dev/null
-From 0c4c0f14b7d704bcb728d018a74788771dc9286b Mon Sep 17 00:00:00 2001
-Date: Mon, 10 Feb 2025 15:01:20 +0800
-Subject: [PATCH] arm64: dts: qcom: ipq6018: move mp5496 regulator out of soc dtsi
-
-Some IPQ60xx SoCs don't come with the mp5496 pmic chip. The mp5496
-pmic was never part of the IPQ60xx SoC, it's optional, so we moved
-it out of the soc dtsi.
-
----
- arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 2 +-
- arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi | 35 ++++++++++++++++++++++++++++
- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 14 -----------
- 3 files changed, 36 insertions(+), 15 deletions(-)
- create mode 100644 arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
-
---- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
-+++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
-@@ -7,7 +7,7 @@
-
- /dts-v1/;
-
--#include "ipq6018.dtsi"
-+#include "ipq6018-mp5496.dtsi"
-
- / {
- model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1";
---- /dev/null
-+++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
-@@ -0,0 +1,35 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-+/*
-+ * ipq6018-mp5496.dtsi describes common properties (e.g. regulators) that
-+ * apply to most devices that make use of the IPQ6018 SoC and MP5496 PMIC.
-+ */
-+
-+#include "ipq6018.dtsi"
-+
-+&cpu0 {
-+ cpu-supply = <&ipq6018_s2>;
-+};
-+
-+&cpu1 {
-+ cpu-supply = <&ipq6018_s2>;
-+};
-+
-+&cpu2 {
-+ cpu-supply = <&ipq6018_s2>;
-+};
-+
-+&cpu3 {
-+ cpu-supply = <&ipq6018_s2>;
-+};
-+
-+&rpm_requests {
-+ regulators {
-+ compatible = "qcom,rpm-mp5496-regulators";
-+
-+ ipq6018_s2: s2 {
-+ regulator-min-microvolt = <725000>;
-+ regulator-max-microvolt = <1062500>;
-+ regulator-always-on;
-+ };
-+ };
-+};
---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -43,7 +43,6 @@
- clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
- clock-names = "cpu";
- operating-points-v2 = <&cpu_opp_table>;
-- cpu-supply = <&ipq6018_s2>;
- #cooling-cells = <2>;
- };
-
-@@ -56,7 +55,6 @@
- clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
- clock-names = "cpu";
- operating-points-v2 = <&cpu_opp_table>;
-- cpu-supply = <&ipq6018_s2>;
- #cooling-cells = <2>;
- };
-
-@@ -69,7 +67,6 @@
- clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
- clock-names = "cpu";
- operating-points-v2 = <&cpu_opp_table>;
-- cpu-supply = <&ipq6018_s2>;
- #cooling-cells = <2>;
- };
-
-@@ -82,7 +79,6 @@
- clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
- clock-names = "cpu";
- operating-points-v2 = <&cpu_opp_table>;
-- cpu-supply = <&ipq6018_s2>;
- #cooling-cells = <2>;
- };
-
-@@ -184,16 +180,6 @@
- rpm_requests: rpm-requests {
- compatible = "qcom,rpm-ipq6018";
- qcom,glink-channels = "rpm_requests";
--
-- regulators {
-- compatible = "qcom,rpm-mp5496-regulators";
--
-- ipq6018_s2: s2 {
-- regulator-min-microvolt = <725000>;
-- regulator-max-microvolt = <1062500>;
-- regulator-always-on;
-- };
-- };
- };
- };
- };
--- /dev/null
+From 0c4c0f14b7d704bcb728d018a74788771dc9286b Mon Sep 17 00:00:00 2001
+Date: Mon, 10 Feb 2025 15:01:20 +0800
+Subject: [PATCH] arm64: dts: qcom: ipq6018: move mp5496 regulator out of soc dtsi
+
+Some IPQ60xx SoCs don't come with the mp5496 pmic chip. The mp5496
+pmic was never part of the IPQ60xx SoC, it's optional, so we moved
+it out of the soc dtsi.
+
+---
+ arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 2 +-
+ arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi | 35 ++++++++++++++++++++++++++++
+ arch/arm64/boot/dts/qcom/ipq6018.dtsi | 14 -----------
+ 3 files changed, 36 insertions(+), 15 deletions(-)
+ create mode 100644 arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
+
+--- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
++++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
+@@ -7,7 +7,7 @@
+
+ /dts-v1/;
+
+-#include "ipq6018.dtsi"
++#include "ipq6018-mp5496.dtsi"
+
+ / {
+ model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1";
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
+@@ -0,0 +1,35 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
++/*
++ * ipq6018-mp5496.dtsi describes common properties (e.g. regulators) that
++ * apply to most devices that make use of the IPQ6018 SoC and MP5496 PMIC.
++ */
++
++#include "ipq6018.dtsi"
++
++&cpu0 {
++ cpu-supply = <&ipq6018_s2>;
++};
++
++&cpu1 {
++ cpu-supply = <&ipq6018_s2>;
++};
++
++&cpu2 {
++ cpu-supply = <&ipq6018_s2>;
++};
++
++&cpu3 {
++ cpu-supply = <&ipq6018_s2>;
++};
++
++&rpm_requests {
++ regulators {
++ compatible = "qcom,rpm-mp5496-regulators";
++
++ ipq6018_s2: s2 {
++ regulator-min-microvolt = <725000>;
++ regulator-max-microvolt = <1062500>;
++ regulator-always-on;
++ };
++ };
++};
+--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+@@ -43,7 +43,6 @@
+ clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu_opp_table>;
+- cpu-supply = <&ipq6018_s2>;
+ #cooling-cells = <2>;
+ };
+
+@@ -56,7 +55,6 @@
+ clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu_opp_table>;
+- cpu-supply = <&ipq6018_s2>;
+ #cooling-cells = <2>;
+ };
+
+@@ -69,7 +67,6 @@
+ clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu_opp_table>;
+- cpu-supply = <&ipq6018_s2>;
+ #cooling-cells = <2>;
+ };
+
+@@ -82,7 +79,6 @@
+ clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu_opp_table>;
+- cpu-supply = <&ipq6018_s2>;
+ #cooling-cells = <2>;
+ };
+
+@@ -184,16 +180,6 @@
+ rpm_requests: rpm-requests {
+ compatible = "qcom,rpm-ipq6018";
+ qcom,glink-channels = "rpm_requests";
+-
+- regulators {
+- compatible = "qcom,rpm-mp5496-regulators";
+-
+- ipq6018_s2: s2 {
+- regulator-min-microvolt = <725000>;
+- regulator-max-microvolt = <1062500>;
+- regulator-always-on;
+- };
+- };
+ };
+ };
+ };
+++ /dev/null
-From e60f872c2dc4c1d9227977c8714373fe6328699c Mon Sep 17 00:00:00 2001
-Date: Mon, 10 Feb 2025 15:01:21 +0800
-Subject: [PATCH] arm64: dts: qcom: ipq6018: rename labels of mp5496 regulator
-
-Change the labels of mp5496 regulator from ipq6018 to mp5496.
-
----
- arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
---- a/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
-+++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
-@@ -7,26 +7,26 @@
- #include "ipq6018.dtsi"
-
- &cpu0 {
-- cpu-supply = <&ipq6018_s2>;
-+ cpu-supply = <&mp5496_s2>;
- };
-
- &cpu1 {
-- cpu-supply = <&ipq6018_s2>;
-+ cpu-supply = <&mp5496_s2>;
- };
-
- &cpu2 {
-- cpu-supply = <&ipq6018_s2>;
-+ cpu-supply = <&mp5496_s2>;
- };
-
- &cpu3 {
-- cpu-supply = <&ipq6018_s2>;
-+ cpu-supply = <&mp5496_s2>;
- };
-
- &rpm_requests {
- regulators {
- compatible = "qcom,rpm-mp5496-regulators";
-
-- ipq6018_s2: s2 {
-+ mp5496_s2: s2 {
- regulator-min-microvolt = <725000>;
- regulator-max-microvolt = <1062500>;
- regulator-always-on;
--- /dev/null
+From e60f872c2dc4c1d9227977c8714373fe6328699c Mon Sep 17 00:00:00 2001
+Date: Mon, 10 Feb 2025 15:01:21 +0800
+Subject: [PATCH] arm64: dts: qcom: ipq6018: rename labels of mp5496 regulator
+
+Change the labels of mp5496 regulator from ipq6018 to mp5496.
+
+---
+ arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
+@@ -7,26 +7,26 @@
+ #include "ipq6018.dtsi"
+
+ &cpu0 {
+- cpu-supply = <&ipq6018_s2>;
++ cpu-supply = <&mp5496_s2>;
+ };
+
+ &cpu1 {
+- cpu-supply = <&ipq6018_s2>;
++ cpu-supply = <&mp5496_s2>;
+ };
+
+ &cpu2 {
+- cpu-supply = <&ipq6018_s2>;
++ cpu-supply = <&mp5496_s2>;
+ };
+
+ &cpu3 {
+- cpu-supply = <&ipq6018_s2>;
++ cpu-supply = <&mp5496_s2>;
+ };
+
+ &rpm_requests {
+ regulators {
+ compatible = "qcom,rpm-mp5496-regulators";
+
+- ipq6018_s2: s2 {
++ mp5496_s2: s2 {
+ regulator-min-microvolt = <725000>;
+ regulator-max-microvolt = <1062500>;
+ regulator-always-on;
+++ /dev/null
-From a566fb9ba8ffecb56c50729390a9ea076f5c9532 Mon Sep 17 00:00:00 2001
-Date: Mon, 10 Feb 2025 15:01:22 +0800
-Subject: [PATCH] arm64: dts: qcom: ipq6018: add LDOA2 regulator
-
-Add LDOA2 regulator from MP5496 to support SDCC voltage scaling.
-
----
- arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
---- a/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
-+++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
-@@ -31,5 +31,14 @@
- regulator-max-microvolt = <1062500>;
- regulator-always-on;
- };
-+
-+ mp5496_l2: l2 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
- };
- };
-+
-+&sdhc {
-+ vqmmc-supply = <&mp5496_l2>;
-+};
--- /dev/null
+From a566fb9ba8ffecb56c50729390a9ea076f5c9532 Mon Sep 17 00:00:00 2001
+Date: Mon, 10 Feb 2025 15:01:22 +0800
+Subject: [PATCH] arm64: dts: qcom: ipq6018: add LDOA2 regulator
+
+Add LDOA2 regulator from MP5496 to support SDCC voltage scaling.
+
+---
+ arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
+@@ -31,5 +31,14 @@
+ regulator-max-microvolt = <1062500>;
+ regulator-always-on;
+ };
++
++ mp5496_l2: l2 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ };
+ };
+ };
++
++&sdhc {
++ vqmmc-supply = <&mp5496_l2>;
++};