drm/amdgpu: fix mec queue policy on single MEC asics

Fixes hangs on single MEC asics.

Fixes: 2ed286fb434 (drm/amdgpu: new queue policy, take first 2 queues of each pipe v2)
Reviewed-by: Alex Xie <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 4c04e9dec28b61f76d33a50571d14a8fabffecc0..862bc724de4239a44989132857db4e7ecb6398bf 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2825,9 +2825,15 @@ static void gfx_v7_0_compute_queue_acquire(struct amdgpu_device *adev)
                if (mec >= adev->gfx.mec.num_mec)
                        break;
 
-               /* policy: amdgpu owns the first two queues of the first MEC */
-               if (mec == 0 && queue < 2)
-                       set_bit(i, adev->gfx.mec.queue_bitmap);
+               if (adev->gfx.mec.num_mec > 1) {
+                       /* policy: amdgpu owns the first two queues of the first MEC */
+                       if (mec == 0 && queue < 2)
+                               set_bit(i, adev->gfx.mec.queue_bitmap);
+               } else {
+                       /* policy: amdgpu owns all queues in the first pipe */
+                       if (mec == 0 && pipe == 0)
+                               set_bit(i, adev->gfx.mec.queue_bitmap);
+               }
        }
 
        /* update the number of active compute rings */

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index ad2e0bba5c932f702d85efda06c0b12af620101e..1370b3980791e41855260e1b4b4755b1964ad068 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1464,9 +1464,15 @@ static void gfx_v8_0_compute_queue_acquire(struct amdgpu_device *adev)
                if (mec >= adev->gfx.mec.num_mec)
                        break;
 
-               /* policy: amdgpu owns the first two queues of the first MEC */
-               if (mec == 0 && queue < 2)
-                       set_bit(i, adev->gfx.mec.queue_bitmap);
+               if (adev->gfx.mec.num_mec > 1) {
+                       /* policy: amdgpu owns the first two queues of the first MEC */
+                       if (mec == 0 && queue < 2)
+                               set_bit(i, adev->gfx.mec.queue_bitmap);
+               } else {
+                       /* policy: amdgpu owns all queues in the first pipe */
+                       if (mec == 0 && pipe == 0)
+                               set_bit(i, adev->gfx.mec.queue_bitmap);
+               }
        }
 
        /* update the number of active compute rings */

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index cf15a350d9bf0ad5d1e7412b2504856c5b3cb981..9d675b37883d35d116c964cadff0f35012a3c783 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -873,9 +873,15 @@ static void gfx_v9_0_compute_queue_acquire(struct amdgpu_device *adev)
                if (mec >= adev->gfx.mec.num_mec)
                        break;
 
-               /* policy: amdgpu owns the first two queues of the first MEC */
-               if (mec == 0 && queue < 2)
-                       set_bit(i, adev->gfx.mec.queue_bitmap);
+               if (adev->gfx.mec.num_mec > 1) {
+                       /* policy: amdgpu owns the first two queues of the first MEC */
+                       if (mec == 0 && queue < 2)
+                               set_bit(i, adev->gfx.mec.queue_bitmap);
+               } else {
+                       /* policy: amdgpu owns all queues in the first pipe */
+                       if (mec == 0 && pipe == 0)
+                               set_bit(i, adev->gfx.mec.queue_bitmap);
+               }
        }
 
        /* update the number of active compute rings */