if (mmc)
ret = mmc_suspend_host(mmc);
-#ifndef RSI_BLKSZ
- bfin_write_SDH_PWR_CTL(bfin_read_SDH_PWR_CTL() & ~PWR_ON);
-#else
- bfin_write_SDH_CFG(bfin_read_SDH_CFG() & ~PWR_ON);
-#endif
peripheral_free_list(drv_data->pin_req);
return ret;
/* Secure Digital Host shares DMA with Nand controller */
bfin_write_DMAC1_PERIMUX(bfin_read_DMAC1_PERIMUX() | 0x1);
#endif
-#ifndef RSI_BLKSZ
- bfin_write_SDH_PWR_CTL(bfin_read_SDH_PWR_CTL() | PWR_ON);
- bfin_write_SDH_CFG(bfin_read_SDH_CFG() | CLKS_EN);
-#else
- bfin_write_SDH_CFG(bfin_read_SDH_CFG() | CLKS_EN | PWR_ON);
-#endif
- SSYNC();
-
- bfin_write_SDH_CFG((bfin_read_SDH_CFG() & 0x1F) | (PUP_SDDAT | PUP_SDDAT3));
- SSYNC();
if (mmc)
ret = mmc_resume_host(mmc);