My previous patch assumed that the DMA mode (represented by 3 lowest bits of
ALS4K_GCR99_DMA_EMULATION_CTRL register) is set to the default value 0. If
that's not the case, it might result in invalid mode to be set.
This patch fixes this potential problem.
Signed-off-by: Ondrej Zary <[email protected]>
Signed-off-by: Takashi Iwai <[email protected]>
snd_als4k_gcr_write(chip, i, 0);
/* enable burst mode to prevent dropouts during high PCI bus usage */
snd_als4k_gcr_write(chip, ALS4K_GCR99_DMA_EMULATION_CTRL,
- snd_als4k_gcr_read(chip, ALS4K_GCR99_DMA_EMULATION_CTRL) | 0x04);
+ (snd_als4k_gcr_read(chip, ALS4K_GCR99_DMA_EMULATION_CTRL) & ~0x07) | 0x04);
spin_unlock_irq(&chip->reg_lock);
}