--- /dev/null
+From 3ca743f8a5b568dc5e5d5f1bab0298a4a43c2360 Mon Sep 17 00:00:00 2001
+Date: Fri, 27 Sep 2024 14:42:22 +0200
+Subject: arm64: dts: rockchip: Switch to hp-det-gpios
+
+Replace the deprecated "hp-det-gpio" property by "hp-det-gpios" in Audio
+Graph Card and Realtek RT5651 Audio Codec device nodes.
+
+Link: https://lore.kernel.org/r/717e7c9527139c3a3e5246dd367a3ad98c5c81b6.1727438777.git.geert+renesas@glider.be
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -32,7 +32,7 @@
+ "Headphones", "HPOR";
+
+ dais = <&i2s0_8ch_p0>;
+- hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
++ hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_detect>;
+ };
--- /dev/null
+From c8152f79c2dd8039e14073be76fdbce8760175da Mon Sep 17 00:00:00 2001
+Date: Sat, 19 Oct 2024 13:12:11 +0300
+Subject: arm64: dts: rockchip: Enable HDMI0 on rock-5b
+
+Add the necessary DT changes to enable HDMI0 on Radxa ROCK 5B.
+
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -4,6 +4,7 @@
+
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/leds/common.h>
++#include <dt-bindings/soc/rockchip,vop2.h>
+ #include "rk3588.dtsi"
+
+ / {
+@@ -37,6 +38,17 @@
+ pinctrl-0 = <&hp_detect>;
+ };
+
++ hdmi0-con {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi0_con_in: endpoint {
++ remote-endpoint = <&hdmi0_out_con>;
++ };
++ };
++ };
++
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+@@ -192,6 +204,26 @@
+ status = "okay";
+ };
+
++&hdmi0 {
++ status = "okay";
++};
++
++&hdmi0_in {
++ hdmi0_in_vp0: endpoint {
++ remote-endpoint = <&vp0_out_hdmi0>;
++ };
++};
++
++&hdmi0_out {
++ hdmi0_out_con: endpoint {
++ remote-endpoint = <&hdmi0_con_in>;
++ };
++};
++
++&hdptxphy_hdmi0 {
++ status = "okay";
++};
++
+ &i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0m2_xfer>;
+@@ -858,3 +890,18 @@
+ &usb_host2_xhci {
+ status = "okay";
+ };
++
++&vop_mmu {
++ status = "okay";
++};
++
++&vop {
++ status = "okay";
++};
++
++&vp0 {
++ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
++ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
++ remote-endpoint = <&hdmi0_in_vp0>;
++ };
++};
--- /dev/null
+From 5c96e63301978f4657c9082c55a066763c8db7b1 Mon Sep 17 00:00:00 2001
+Date: Sat, 5 Oct 2024 22:40:12 +0200
+Subject: arm64: dts: rockchip: adapt regulator nodenames to preferred form
+
+The preferred nodename for fixed-regulators has changed to
+pattern: '^regulator(-[0-9]+v[0-9]+|-[0-9a-z-]+)?$'
+
+Fix all Rockchip DT regulator nodenames.
+
+[adapted rebased on top of a number of other changes and included
+ neu6a-wifi + wolfvision-pf5-io-expander overlays]
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -84,7 +84,7 @@
+ shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
+ };
+
+- vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
++ vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+@@ -99,7 +99,7 @@
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+- vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
++ vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie2x1l2";
+ regulator-min-microvolt = <3300000>;
+@@ -108,7 +108,7 @@
+ vin-supply = <&vcc_3v3_s3>;
+ };
+
+- vcc3v3_pcie30: vcc3v3-pcie30-regulator {
++ vcc3v3_pcie30: regulator-vcc3v3-pcie30 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+@@ -121,7 +121,7 @@
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+- vcc5v0_host: vcc5v0-host-regulator {
++ vcc5v0_host: regulator-vcc5v0-host {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
+ regulator-boot-on;
+@@ -135,7 +135,7 @@
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+- vcc5v0_sys: vcc5v0-sys-regulator {
++ vcc5v0_sys: regulator-vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+@@ -144,7 +144,7 @@
+ regulator-max-microvolt = <5000000>;
+ };
+
+- vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
++ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v1_nldo_s3";
+ regulator-always-on;
--- /dev/null
+From 2ddd93481bce86c6a46223f45accdb3b149a43e4 Mon Sep 17 00:00:00 2001
+Date: Thu, 28 Nov 2024 12:06:30 +0000
+Subject: arm64: dts: rockchip: rename rfkill label for Radxa ROCK 5B
+
+on ROCK 5B, there is no PCIe slot, instead there is a M.2 slot.
+rfkill pin is not exclusive to PCIe devices, there is SDIO Wi-Fi
+devices.
+
+rename rfkill label from "rfkill-pcie-wlan" to "rfkill-m2-wlan", it
+matches with rfkill-bt.
+
+Fixes: 82d40b141a4c ("arm64: dts: rockchip: add rfkill node for M.2 Key E WiFi on rock-5b")
+Fixes: 82d40b141a4c ("arm64: dts: rockchip: add rfkill node for M.2 Key E WiFi on rock-5b")
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -72,7 +72,7 @@
+
+ rfkill {
+ compatible = "rfkill-gpio";
+- label = "rfkill-pcie-wlan";
++ label = "rfkill-m2-wlan";
+ radio-type = "wlan";
+ shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+ };
--- /dev/null
+From 2efdb041019fd6c58abefba3eb6fdc4d659e576c Mon Sep 17 00:00:00 2001
+Date: Thu, 6 Feb 2025 11:03:30 +0800
+Subject: arm64: dts: rockchip: Fix label name of hdptxphy for RK3588
+
+The hdptxphy is a combo transmit-PHY for HDMI2.1 TMDS Link, FRL Link, DP
+and eDP Link. Therefore, it is better to name it hdptxphy0 other than
+hdptxphy_hdmi0, which will be referenced by both hdmi0 and edp0 nodes.
+
+[added armsom-sige7, where hdmi-support was added recently and also
+ the hdptxphy0-as-dclk source I just added]
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -220,7 +220,7 @@
+ };
+ };
+
+-&hdptxphy_hdmi0 {
++&hdptxphy0 {
+ status = "okay";
+ };
+
--- /dev/null
+From 77cea7ca13680e14119a3b9635c7ef16cd7ee44e Mon Sep 17 00:00:00 2001
+Date: Wed, 11 Dec 2024 01:06:17 +0200
+Subject: arm64: dts: rockchip: Enable HDMI1 on rock-5b
+
+Add the necessary DT changes to enable the second HDMI output port on
+Radxa ROCK 5B.
+
+While at it, switch the position of &vop_mmu and @vop to maintain the
+alphabetical order.
+
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -49,6 +49,17 @@
+ };
+ };
+
++ hdmi1-con {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi1_con_in: endpoint {
++ remote-endpoint = <&hdmi1_out_con>;
++ };
++ };
++ };
++
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+@@ -220,10 +231,32 @@
+ };
+ };
+
++&hdmi1 {
++ pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
++ &hdmim1_tx1_scl &hdmim1_tx1_sda>;
++ status = "okay";
++};
++
++&hdmi1_in {
++ hdmi1_in_vp1: endpoint {
++ remote-endpoint = <&vp1_out_hdmi1>;
++ };
++};
++
++&hdmi1_out {
++ hdmi1_out_con: endpoint {
++ remote-endpoint = <&hdmi1_con_in>;
++ };
++};
++
+ &hdptxphy0 {
+ status = "okay";
+ };
+
++&hdptxphy1 {
++ status = "okay";
++};
++
+ &i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0m2_xfer>;
+@@ -891,11 +924,11 @@
+ status = "okay";
+ };
+
+-&vop_mmu {
++&vop {
+ status = "okay";
+ };
+
+-&vop {
++&vop_mmu {
+ status = "okay";
+ };
+
+@@ -905,3 +938,10 @@
+ remote-endpoint = <&hdmi0_in_vp0>;
+ };
+ };
++
++&vp1 {
++ vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {
++ reg = <ROCKCHIP_VOP2_EP_HDMI1>;
++ remote-endpoint = <&hdmi1_in_vp1>;
++ };
++};
--- /dev/null
+From 97aa62ed1e970bf8aa9f57e87c946a95fa3d5bef Mon Sep 17 00:00:00 2001
+Date: Mon, 17 Feb 2025 16:47:42 -0500
+Subject: arm64: dts: rockchip: Enable HDMI audio outputs for Rock 5B
+
+HDMI audio is available on the Rock 5B HDMI TX ports.
+Enable it for both ports.
+
+Fixes: 419d1918105e ("ASoC: simple-card-utils: use __free(device_node) for device node")
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -231,6 +231,10 @@
+ };
+ };
+
++&hdmi0_sound {
++ status = "okay";
++};
++
+ &hdmi1 {
+ pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
+ &hdmim1_tx1_scl &hdmim1_tx1_sda>;
+@@ -249,6 +253,10 @@
+ };
+ };
+
++&hdmi1_sound {
++ status = "okay";
++};
++
+ &hdptxphy0 {
+ status = "okay";
+ };
+@@ -351,6 +359,14 @@
+ };
+ };
+
++&i2s5_8ch {
++ status = "okay";
++};
++
++&i2s6_8ch {
++ status = "okay";
++};
++
+ &package_thermal {
+ polling-delay = <1000>;
+
--- /dev/null
+From f94500eb7328b35f3d0927635b1aba26c85ea4b0 Mon Sep 17 00:00:00 2001
+Date: Thu, 20 Feb 2025 19:58:11 +0100
+Subject: arm64: dts: rockchip: Add GPU power domain regulator dependency for
+ RK3588
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Enabling the GPU power domain requires that the GPU regulator is
+enabled. The regulator is enabled at boot time, but gets disabled
+automatically when there are no users.
+
+This means the system might run into a failure state hanging the
+whole system for the following use cases:
+
+ * if the GPU driver is being probed late (e.g. build as a
+ module and firmware is not in initramfs), the regulator
+ might already have been disabled. In that case the power
+ domain is enabled before the regulator.
+ * unbinding the GPU driver will disable the PM domain and
+ the regulator. When the driver is bound again, the PM
+ domain will be enabled before the regulator and error
+ appears.
+
+Avoid this by adding an explicit regulator dependency to the
+power domain.
+
+Link: https://lore.kernel.org/r/20250220-rk3588-gpu-pwr-domain-regulator-v6-8-a4f9c24e5b81@kernel.org
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -425,6 +425,10 @@
+ status = "okay";
+ };
+
++&pd_gpu {
++ domain-supply = <&vdd_gpu_s0>;
++};
++
+ &pinctrl {
+ hym8563 {
+ hym8563_int: hym8563-int {
--- /dev/null
+From c62d8fdb27391ee72bfdf53328463813997844f1 Mon Sep 17 00:00:00 2001
+Date: Fri, 7 Mar 2025 12:18:57 +0300
+Subject: arm64: dts: rockchip: Enable HDMI receiver on rock-5b
+
+The Rock 5B has a Micro HDMI port, which can be used for receiving
+HDMI data. This enables support for it.
+
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -257,6 +257,17 @@
+ status = "okay";
+ };
+
++&hdmi_receiver_cma {
++ status = "okay";
++};
++
++&hdmi_receiver {
++ hpd-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
++ pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>;
++ pinctrl-names = "default";
++ status = "okay";
++};
++
+ &hdptxphy0 {
+ status = "okay";
+ };
+@@ -430,6 +441,12 @@
+ };
+
+ &pinctrl {
++ hdmirx {
++ hdmirx_hpd: hdmirx-5v-detection {
++ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
--- /dev/null
+From 425af91c58023a8924cc2330384e040d388adc4e Mon Sep 17 00:00:00 2001
+Date: Fri, 25 Apr 2025 10:44:44 +0200
+Subject: arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3588-rock-5b
+
+The Radxa Rock 5B component placement document identifies the SPI Nor
+Flash chip as 'U4300' which is described on page 25 of the Schematic
+v1.45. There we can see that the VCC connector is connected to the
+VCC_3V3_S3 power source.
+
+This fixes the following warning:
+
+ spi-nor spi5.0: supply vcc not found, using dummy regulator
+
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -562,6 +562,7 @@
+ spi-max-frequency = <104000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
++ vcc-supply = <&vcc_3v3_s3>;
+ };
+ };
+
--- /dev/null
+From aadfbdcf7e1e7f3892e0e4bdcc3c9c7c9adfb723 Mon Sep 17 00:00:00 2001
+Date: Thu, 8 May 2025 19:48:50 +0200
+Subject: arm64: dts: rockchip: move rock 5b to include file
+
+Radxa released some more boards, which are based on the original
+Rock 5B. Move its board description into an include file to avoid
+unnecessary duplication.
+
+
+[The original submission was split into two elements, renaming the file
+ and then moving some nodes around. This was done to make review easier
+ due to the diff being smaller. This commit is a squash of both of them
+ to facilitate bisectability and was also intended by the original author]
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -2,532 +2,11 @@
+
+ /dts-v1/;
+
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/leds/common.h>
+-#include <dt-bindings/soc/rockchip,vop2.h>
+-#include "rk3588.dtsi"
++#include "rk3588-rock-5b.dtsi"
+
+ / {
+ model = "Radxa ROCK 5B";
+ compatible = "radxa,rock-5b", "rockchip,rk3588";
+-
+- aliases {
+- mmc0 = &sdhci;
+- mmc1 = &sdmmc;
+- mmc2 = &sdio;
+- };
+-
+- chosen {
+- stdout-path = "serial2:1500000n8";
+- };
+-
+- analog-sound {
+- compatible = "audio-graph-card";
+- label = "rk3588-es8316";
+-
+- widgets = "Microphone", "Mic Jack",
+- "Headphone", "Headphones";
+-
+- routing = "MIC2", "Mic Jack",
+- "Headphones", "HPOL",
+- "Headphones", "HPOR";
+-
+- dais = <&i2s0_8ch_p0>;
+- hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&hp_detect>;
+- };
+-
+- hdmi0-con {
+- compatible = "hdmi-connector";
+- type = "a";
+-
+- port {
+- hdmi0_con_in: endpoint {
+- remote-endpoint = <&hdmi0_out_con>;
+- };
+- };
+- };
+-
+- hdmi1-con {
+- compatible = "hdmi-connector";
+- type = "a";
+-
+- port {
+- hdmi1_con_in: endpoint {
+- remote-endpoint = <&hdmi1_out_con>;
+- };
+- };
+- };
+-
+- leds {
+- compatible = "gpio-leds";
+- pinctrl-names = "default";
+- pinctrl-0 = <&led_rgb_b>;
+-
+- led_rgb_b {
+- function = LED_FUNCTION_STATUS;
+- color = <LED_COLOR_ID_BLUE>;
+- gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+- linux,default-trigger = "heartbeat";
+- };
+- };
+-
+- fan: pwm-fan {
+- compatible = "pwm-fan";
+- cooling-levels = <0 120 150 180 210 240 255>;
+- fan-supply = <&vcc5v0_sys>;
+- pwms = <&pwm1 0 50000 0>;
+- #cooling-cells = <2>;
+- };
+-
+- rfkill {
+- compatible = "rfkill-gpio";
+- label = "rfkill-m2-wlan";
+- radio-type = "wlan";
+- shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+- };
+-
+- rfkill-bt {
+- compatible = "rfkill-gpio";
+- label = "rfkill-m2-bt";
+- radio-type = "bluetooth";
+- shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
+- };
+-
+- vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
+- compatible = "regulator-fixed";
+- enable-active-high;
+- gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pcie2_0_vcc3v3_en>;
+- regulator-name = "vcc3v3_pcie2x1l0";
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- startup-delay-us = <50000>;
+- vin-supply = <&vcc5v0_sys>;
+- };
+-
+- vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 {
+- compatible = "regulator-fixed";
+- regulator-name = "vcc3v3_pcie2x1l2";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- startup-delay-us = <5000>;
+- vin-supply = <&vcc_3v3_s3>;
+- };
+-
+- vcc3v3_pcie30: regulator-vcc3v3-pcie30 {
+- compatible = "regulator-fixed";
+- enable-active-high;
+- gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pcie3_vcc3v3_en>;
+- regulator-name = "vcc3v3_pcie30";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- startup-delay-us = <5000>;
+- vin-supply = <&vcc5v0_sys>;
+- };
+-
+- vcc5v0_host: regulator-vcc5v0-host {
+- compatible = "regulator-fixed";
+- regulator-name = "vcc5v0_host";
+- regulator-boot-on;
+- regulator-always-on;
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- enable-active-high;
+- gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&vcc5v0_host_en>;
+- vin-supply = <&vcc5v0_sys>;
+- };
+-
+- vcc5v0_sys: regulator-vcc5v0-sys {
+- compatible = "regulator-fixed";
+- regulator-name = "vcc5v0_sys";
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- };
+-
+- vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
+- compatible = "regulator-fixed";
+- regulator-name = "vcc_1v1_nldo_s3";
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1100000>;
+- regulator-max-microvolt = <1100000>;
+- vin-supply = <&vcc5v0_sys>;
+- };
+-};
+-
+-&combphy0_ps {
+- status = "okay";
+-};
+-
+-&combphy1_ps {
+- status = "okay";
+-};
+-
+-&combphy2_psu {
+- status = "okay";
+-};
+-
+-&cpu_b0 {
+- cpu-supply = <&vdd_cpu_big0_s0>;
+-};
+-
+-&cpu_b1 {
+- cpu-supply = <&vdd_cpu_big0_s0>;
+-};
+-
+-&cpu_b2 {
+- cpu-supply = <&vdd_cpu_big1_s0>;
+-};
+-
+-&cpu_b3 {
+- cpu-supply = <&vdd_cpu_big1_s0>;
+-};
+-
+-&cpu_l0 {
+- cpu-supply = <&vdd_cpu_lit_s0>;
+-};
+-
+-&cpu_l1 {
+- cpu-supply = <&vdd_cpu_lit_s0>;
+-};
+-
+-&cpu_l2 {
+- cpu-supply = <&vdd_cpu_lit_s0>;
+-};
+-
+-&cpu_l3 {
+- cpu-supply = <&vdd_cpu_lit_s0>;
+-};
+-
+-&gpu {
+- mali-supply = <&vdd_gpu_s0>;
+- status = "okay";
+-};
+-
+-&hdmi0 {
+- status = "okay";
+-};
+-
+-&hdmi0_in {
+- hdmi0_in_vp0: endpoint {
+- remote-endpoint = <&vp0_out_hdmi0>;
+- };
+-};
+-
+-&hdmi0_out {
+- hdmi0_out_con: endpoint {
+- remote-endpoint = <&hdmi0_con_in>;
+- };
+-};
+-
+-&hdmi0_sound {
+- status = "okay";
+-};
+-
+-&hdmi1 {
+- pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
+- &hdmim1_tx1_scl &hdmim1_tx1_sda>;
+- status = "okay";
+-};
+-
+-&hdmi1_in {
+- hdmi1_in_vp1: endpoint {
+- remote-endpoint = <&vp1_out_hdmi1>;
+- };
+-};
+-
+-&hdmi1_out {
+- hdmi1_out_con: endpoint {
+- remote-endpoint = <&hdmi1_con_in>;
+- };
+-};
+-
+-&hdmi1_sound {
+- status = "okay";
+-};
+-
+-&hdmi_receiver_cma {
+- status = "okay";
+-};
+-
+-&hdmi_receiver {
+- hpd-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
+- pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>;
+- pinctrl-names = "default";
+- status = "okay";
+-};
+-
+-&hdptxphy0 {
+- status = "okay";
+-};
+-
+-&hdptxphy1 {
+- status = "okay";
+-};
+-
+-&i2c0 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&i2c0m2_xfer>;
+- status = "okay";
+-
+- vdd_cpu_big0_s0: regulator@42 {
+- compatible = "rockchip,rk8602";
+- reg = <0x42>;
+- fcs,suspend-voltage-selector = <1>;
+- regulator-name = "vdd_cpu_big0_s0";
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <550000>;
+- regulator-max-microvolt = <1050000>;
+- regulator-ramp-delay = <2300>;
+- vin-supply = <&vcc5v0_sys>;
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vdd_cpu_big1_s0: regulator@43 {
+- compatible = "rockchip,rk8603", "rockchip,rk8602";
+- reg = <0x43>;
+- fcs,suspend-voltage-selector = <1>;
+- regulator-name = "vdd_cpu_big1_s0";
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <550000>;
+- regulator-max-microvolt = <1050000>;
+- regulator-ramp-delay = <2300>;
+- vin-supply = <&vcc5v0_sys>;
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-};
+-
+-&i2c6 {
+- status = "okay";
+-
+- hym8563: rtc@51 {
+- compatible = "haoyu,hym8563";
+- reg = <0x51>;
+- #clock-cells = <0>;
+- clock-output-names = "hym8563";
+- pinctrl-names = "default";
+- pinctrl-0 = <&hym8563_int>;
+- interrupt-parent = <&gpio0>;
+- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+- wakeup-source;
+- };
+-};
+-
+-&i2c7 {
+- status = "okay";
+-
+- es8316: audio-codec@11 {
+- compatible = "everest,es8316";
+- reg = <0x11>;
+- clocks = <&cru I2S0_8CH_MCLKOUT>;
+- clock-names = "mclk";
+- assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
+- assigned-clock-rates = <12288000>;
+- #sound-dai-cells = <0>;
+-
+- port {
+- es8316_p0_0: endpoint {
+- remote-endpoint = <&i2s0_8ch_p0_0>;
+- };
+- };
+- };
+-};
+-
+-&i2s0_8ch {
+- pinctrl-names = "default";
+- pinctrl-0 = <&i2s0_lrck
+- &i2s0_mclk
+- &i2s0_sclk
+- &i2s0_sdi0
+- &i2s0_sdo0>;
+- status = "okay";
+-
+- i2s0_8ch_p0: port {
+- i2s0_8ch_p0_0: endpoint {
+- dai-format = "i2s";
+- mclk-fs = <256>;
+- remote-endpoint = <&es8316_p0_0>;
+- };
+- };
+-};
+-
+-&i2s5_8ch {
+- status = "okay";
+-};
+-
+-&i2s6_8ch {
+- status = "okay";
+-};
+-
+-&package_thermal {
+- polling-delay = <1000>;
+-
+- trips {
+- package_fan0: package-fan0 {
+- temperature = <55000>;
+- hysteresis = <2000>;
+- type = "active";
+- };
+-
+- package_fan1: package-fan1 {
+- temperature = <65000>;
+- hysteresis = <2000>;
+- type = "active";
+- };
+- };
+-
+- cooling-maps {
+- map0 {
+- trip = <&package_fan0>;
+- cooling-device = <&fan THERMAL_NO_LIMIT 1>;
+- };
+-
+- map1 {
+- trip = <&package_fan1>;
+- cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
+- };
+- };
+-};
+-
+-&pcie2x1l0 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pcie2_0_rst>;
+- reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
+- vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
+- status = "okay";
+-};
+-
+-&pcie2x1l2 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pcie2_2_rst>;
+- reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
+- vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
+- status = "okay";
+-};
+-
+-&pcie30phy {
+- status = "okay";
+-};
+-
+-&pcie3x4 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pcie3_rst>;
+- reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+- vpcie3v3-supply = <&vcc3v3_pcie30>;
+- status = "okay";
+-};
+-
+-&pd_gpu {
+- domain-supply = <&vdd_gpu_s0>;
+-};
+-
+-&pinctrl {
+- hdmirx {
+- hdmirx_hpd: hdmirx-5v-detection {
+- rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+- hym8563 {
+- hym8563_int: hym8563-int {
+- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+- leds {
+- led_rgb_b: led-rgb-b {
+- rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+- sound {
+- hp_detect: hp-detect {
+- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+- pcie2 {
+- pcie2_0_rst: pcie2-0-rst {
+- rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+-
+- pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
+- rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+-
+- pcie2_2_rst: pcie2-2-rst {
+- rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+- pcie3 {
+- pcie3_rst: pcie3-rst {
+- rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+-
+- pcie3_vcc3v3_en: pcie3-vcc3v3-en {
+- rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+- usb {
+- vcc5v0_host_en: vcc5v0-host-en {
+- rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-};
+-
+-&pwm1 {
+- status = "okay";
+-};
+-
+-&saradc {
+- vref-supply = <&avcc_1v8_s0>;
+- status = "okay";
+-};
+-
+-&sdhci {
+- bus-width = <8>;
+- no-sdio;
+- no-sd;
+- non-removable;
+- mmc-hs400-1_8v;
+- mmc-hs400-enhanced-strobe;
+- status = "okay";
+-};
+-
+-&sdmmc {
+- max-frequency = <200000000>;
+- no-sdio;
+- no-mmc;
+- bus-width = <4>;
+- cap-mmc-highspeed;
+- cap-sd-highspeed;
+- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+- disable-wp;
+- sd-uhs-sdr104;
+- vmmc-supply = <&vcc_3v3_s3>;
+- vqmmc-supply = <&vccio_sd_s0>;
+- status = "okay";
+ };
+
+ &sdio {
+@@ -551,435 +30,23 @@
+ status = "okay";
+ };
+
+-&sfc {
+- pinctrl-names = "default";
+- pinctrl-0 = <&fspim2_pins>;
+- status = "okay";
+-
+- flash@0 {
+- compatible = "jedec,spi-nor";
+- reg = <0>;
+- spi-max-frequency = <104000000>;
+- spi-rx-bus-width = <4>;
+- spi-tx-bus-width = <1>;
+- vcc-supply = <&vcc_3v3_s3>;
+- };
+-};
+-
+ &uart6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>;
+ status = "okay";
+ };
+
+-&spi2 {
+- status = "okay";
+- assigned-clocks = <&cru CLK_SPI2>;
+- assigned-clock-rates = <200000000>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+- num-cs = <1>;
+-
+- pmic@0 {
+- compatible = "rockchip,rk806";
+- spi-max-frequency = <1000000>;
+- reg = <0x0>;
+-
+- interrupt-parent = <&gpio0>;
+- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+-
+- pinctrl-names = "default";
+- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+-
+- system-power-controller;
+-
+- vcc1-supply = <&vcc5v0_sys>;
+- vcc2-supply = <&vcc5v0_sys>;
+- vcc3-supply = <&vcc5v0_sys>;
+- vcc4-supply = <&vcc5v0_sys>;
+- vcc5-supply = <&vcc5v0_sys>;
+- vcc6-supply = <&vcc5v0_sys>;
+- vcc7-supply = <&vcc5v0_sys>;
+- vcc8-supply = <&vcc5v0_sys>;
+- vcc9-supply = <&vcc5v0_sys>;
+- vcc10-supply = <&vcc5v0_sys>;
+- vcc11-supply = <&vcc_2v0_pldo_s3>;
+- vcc12-supply = <&vcc5v0_sys>;
+- vcc13-supply = <&vcc_1v1_nldo_s3>;
+- vcc14-supply = <&vcc_1v1_nldo_s3>;
+- vcca-supply = <&vcc5v0_sys>;
+-
+- gpio-controller;
+- #gpio-cells = <2>;
+-
+- rk806_dvs1_null: dvs1-null-pins {
+- pins = "gpio_pwrctrl1";
+- function = "pin_fun0";
+- };
+-
+- rk806_dvs2_null: dvs2-null-pins {
+- pins = "gpio_pwrctrl2";
+- function = "pin_fun0";
+- };
+-
+- rk806_dvs3_null: dvs3-null-pins {
+- pins = "gpio_pwrctrl3";
+- function = "pin_fun0";
+- };
+-
+- regulators {
+- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
+- regulator-boot-on;
+- regulator-min-microvolt = <550000>;
+- regulator-max-microvolt = <950000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vdd_gpu_s0";
+- regulator-enable-ramp-delay = <400>;
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <550000>;
+- regulator-max-microvolt = <950000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vdd_cpu_lit_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vdd_log_s0: dcdc-reg3 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <675000>;
+- regulator-max-microvolt = <750000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vdd_log_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- regulator-suspend-microvolt = <750000>;
+- };
+- };
+-
+- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <550000>;
+- regulator-max-microvolt = <950000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vdd_vdenc_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vdd_ddr_s0: dcdc-reg5 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <675000>;
+- regulator-max-microvolt = <900000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vdd_ddr_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- regulator-suspend-microvolt = <850000>;
+- };
+- };
+-
+- vdd2_ddr_s3: dcdc-reg6 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-name = "vdd2_ddr_s3";
+-
+- regulator-state-mem {
+- regulator-on-in-suspend;
+- };
+- };
+-
+- vcc_2v0_pldo_s3: dcdc-reg7 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <2000000>;
+- regulator-max-microvolt = <2000000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vdd_2v0_pldo_s3";
+-
+- regulator-state-mem {
+- regulator-on-in-suspend;
+- regulator-suspend-microvolt = <2000000>;
+- };
+- };
+-
+- vcc_3v3_s3: dcdc-reg8 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-name = "vcc_3v3_s3";
+-
+- regulator-state-mem {
+- regulator-on-in-suspend;
+- regulator-suspend-microvolt = <3300000>;
+- };
+- };
+-
+- vddq_ddr_s0: dcdc-reg9 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-name = "vddq_ddr_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vcc_1v8_s3: dcdc-reg10 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <1800000>;
+- regulator-name = "vcc_1v8_s3";
+-
+- regulator-state-mem {
+- regulator-on-in-suspend;
+- regulator-suspend-microvolt = <1800000>;
+- };
+- };
+-
+- avcc_1v8_s0: pldo-reg1 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <1800000>;
+- regulator-name = "avcc_1v8_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vcc_1v8_s0: pldo-reg2 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <1800000>;
+- regulator-name = "vcc_1v8_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- regulator-suspend-microvolt = <1800000>;
+- };
+- };
+-
+- avdd_1v2_s0: pldo-reg3 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1200000>;
+- regulator-max-microvolt = <1200000>;
+- regulator-name = "avdd_1v2_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vcc_3v3_s0: pldo-reg4 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vcc_3v3_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vccio_sd_s0: pldo-reg5 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vccio_sd_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- pldo6_s3: pldo-reg6 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <1800000>;
+- regulator-name = "pldo6_s3";
+-
+- regulator-state-mem {
+- regulator-on-in-suspend;
+- regulator-suspend-microvolt = <1800000>;
+- };
+- };
+-
+- vdd_0v75_s3: nldo-reg1 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <750000>;
+- regulator-max-microvolt = <750000>;
+- regulator-name = "vdd_0v75_s3";
+-
+- regulator-state-mem {
+- regulator-on-in-suspend;
+- regulator-suspend-microvolt = <750000>;
+- };
+- };
+-
+- vdd_ddr_pll_s0: nldo-reg2 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <850000>;
+- regulator-max-microvolt = <850000>;
+- regulator-name = "vdd_ddr_pll_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- regulator-suspend-microvolt = <850000>;
+- };
+- };
+-
+- avdd_0v75_s0: nldo-reg3 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <750000>;
+- regulator-max-microvolt = <750000>;
+- regulator-name = "avdd_0v75_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vdd_0v85_s0: nldo-reg4 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <850000>;
+- regulator-max-microvolt = <850000>;
+- regulator-name = "vdd_0v85_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vdd_0v75_s0: nldo-reg5 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <750000>;
+- regulator-max-microvolt = <750000>;
+- regulator-name = "vdd_0v75_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
++&pinctrl {
++ usb {
++ vcc5v0_host_en: vcc5v0-host-en {
++ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+ };
+
+-&tsadc {
+- status = "okay";
+-};
+-
+-&uart2 {
+- pinctrl-0 = <&uart2m0_xfer>;
+- status = "okay";
+-};
+-
+-&u2phy1 {
+- status = "okay";
+-};
+-
+-&u2phy1_otg {
+- status = "okay";
+-};
+-
+-&u2phy2 {
+- status = "okay";
+-};
+-
+-&u2phy2_host {
+- /* connected to USB hub, which is powered by vcc5v0_sys */
+- phy-supply = <&vcc5v0_sys>;
+- status = "okay";
+-};
+-
+-&u2phy3 {
+- status = "okay";
+-};
+-
+-&u2phy3_host {
+- phy-supply = <&vcc5v0_host>;
+- status = "okay";
+-};
+-
+-&usbdp_phy1 {
+- status = "okay";
+-};
+-
+-&usb_host0_ehci {
+- status = "okay";
+-};
+-
+-&usb_host0_ohci {
+- status = "okay";
+-};
+-
+-&usb_host1_ehci {
+- status = "okay";
+-};
+-
+-&usb_host1_ohci {
+- status = "okay";
+-};
+-
+-&usb_host1_xhci {
+- dr_mode = "host";
+- status = "okay";
+-};
+-
+-&usb_host2_xhci {
+- status = "okay";
+-};
+-
+-&vop {
+- status = "okay";
+-};
+-
+-&vop_mmu {
+- status = "okay";
+-};
+-
+-&vp0 {
+- vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+- remote-endpoint = <&hdmi0_in_vp0>;
+- };
+-};
+-
+-&vp1 {
+- vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {
+- reg = <ROCKCHIP_VOP2_EP_HDMI1>;
+- remote-endpoint = <&hdmi1_in_vp1>;
+- };
++&vcc5v0_host {
++ enable-active-high;
++ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&vcc5v0_host_en>;
+ };
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
+@@ -0,0 +1,945 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/leds/common.h>
++#include <dt-bindings/soc/rockchip,vop2.h>
++#include "rk3588.dtsi"
++
++/ {
++ aliases {
++ mmc0 = &sdhci;
++ mmc1 = &sdmmc;
++ mmc2 = &sdio;
++ };
++
++ chosen {
++ stdout-path = "serial2:1500000n8";
++ };
++
++ analog-sound {
++ compatible = "audio-graph-card";
++ label = "rk3588-es8316";
++
++ widgets = "Microphone", "Mic Jack",
++ "Headphone", "Headphones";
++
++ routing = "MIC2", "Mic Jack",
++ "Headphones", "HPOL",
++ "Headphones", "HPOR";
++
++ dais = <&i2s0_8ch_p0>;
++ hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&hp_detect>;
++ };
++
++ hdmi0-con {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi0_con_in: endpoint {
++ remote-endpoint = <&hdmi0_out_con>;
++ };
++ };
++ };
++
++ hdmi1-con {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi1_con_in: endpoint {
++ remote-endpoint = <&hdmi1_out_con>;
++ };
++ };
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&led_rgb_b>;
++
++ led_rgb_b {
++ function = LED_FUNCTION_STATUS;
++ color = <LED_COLOR_ID_BLUE>;
++ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
++ fan: pwm-fan {
++ compatible = "pwm-fan";
++ cooling-levels = <0 120 150 180 210 240 255>;
++ fan-supply = <&vcc5v0_sys>;
++ pwms = <&pwm1 0 50000 0>;
++ #cooling-cells = <2>;
++ };
++
++ rfkill {
++ compatible = "rfkill-gpio";
++ label = "rfkill-m2-wlan";
++ radio-type = "wlan";
++ shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
++ };
++
++ rfkill-bt {
++ compatible = "rfkill-gpio";
++ label = "rfkill-m2-bt";
++ radio-type = "bluetooth";
++ shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
++ };
++
++ vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie2_0_vcc3v3_en>;
++ regulator-name = "vcc3v3_pcie2x1l0";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ startup-delay-us = <50000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc3v3_pcie2x1l2";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ startup-delay-us = <5000>;
++ vin-supply = <&vcc_3v3_s3>;
++ };
++
++ vcc3v3_pcie30: regulator-vcc3v3-pcie30 {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie3_vcc3v3_en>;
++ regulator-name = "vcc3v3_pcie30";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ startup-delay-us = <5000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc5v0_host: regulator-vcc5v0-host {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc5v0_host";
++ regulator-boot-on;
++ regulator-always-on;
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc5v0_sys: regulator-vcc5v0-sys {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc5v0_sys";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ };
++
++ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc_1v1_nldo_s3";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1100000>;
++ regulator-max-microvolt = <1100000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++};
++
++&combphy0_ps {
++ status = "okay";
++};
++
++&combphy1_ps {
++ status = "okay";
++};
++
++&combphy2_psu {
++ status = "okay";
++};
++
++&cpu_b0 {
++ cpu-supply = <&vdd_cpu_big0_s0>;
++};
++
++&cpu_b1 {
++ cpu-supply = <&vdd_cpu_big0_s0>;
++};
++
++&cpu_b2 {
++ cpu-supply = <&vdd_cpu_big1_s0>;
++};
++
++&cpu_b3 {
++ cpu-supply = <&vdd_cpu_big1_s0>;
++};
++
++&cpu_l0 {
++ cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l1 {
++ cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l2 {
++ cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l3 {
++ cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&gpu {
++ mali-supply = <&vdd_gpu_s0>;
++ status = "okay";
++};
++
++&hdmi0 {
++ status = "okay";
++};
++
++&hdmi0_in {
++ hdmi0_in_vp0: endpoint {
++ remote-endpoint = <&vp0_out_hdmi0>;
++ };
++};
++
++&hdmi0_out {
++ hdmi0_out_con: endpoint {
++ remote-endpoint = <&hdmi0_con_in>;
++ };
++};
++
++&hdmi0_sound {
++ status = "okay";
++};
++
++&hdmi1 {
++ pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
++ &hdmim1_tx1_scl &hdmim1_tx1_sda>;
++ status = "okay";
++};
++
++&hdmi1_in {
++ hdmi1_in_vp1: endpoint {
++ remote-endpoint = <&vp1_out_hdmi1>;
++ };
++};
++
++&hdmi1_out {
++ hdmi1_out_con: endpoint {
++ remote-endpoint = <&hdmi1_con_in>;
++ };
++};
++
++&hdmi1_sound {
++ status = "okay";
++};
++
++&hdmi_receiver_cma {
++ status = "okay";
++};
++
++&hdmi_receiver {
++ hpd-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
++ pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>;
++ pinctrl-names = "default";
++ status = "okay";
++};
++
++&hdptxphy0 {
++ status = "okay";
++};
++
++&hdptxphy1 {
++ status = "okay";
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0m2_xfer>;
++ status = "okay";
++
++ vdd_cpu_big0_s0: regulator@42 {
++ compatible = "rockchip,rk8602";
++ reg = <0x42>;
++ fcs,suspend-voltage-selector = <1>;
++ regulator-name = "vdd_cpu_big0_s0";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <550000>;
++ regulator-max-microvolt = <1050000>;
++ regulator-ramp-delay = <2300>;
++ vin-supply = <&vcc5v0_sys>;
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_cpu_big1_s0: regulator@43 {
++ compatible = "rockchip,rk8603", "rockchip,rk8602";
++ reg = <0x43>;
++ fcs,suspend-voltage-selector = <1>;
++ regulator-name = "vdd_cpu_big1_s0";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <550000>;
++ regulator-max-microvolt = <1050000>;
++ regulator-ramp-delay = <2300>;
++ vin-supply = <&vcc5v0_sys>;
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++};
++
++&i2c6 {
++ status = "okay";
++
++ hym8563: rtc@51 {
++ compatible = "haoyu,hym8563";
++ reg = <0x51>;
++ #clock-cells = <0>;
++ clock-output-names = "hym8563";
++ pinctrl-names = "default";
++ pinctrl-0 = <&hym8563_int>;
++ interrupt-parent = <&gpio0>;
++ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
++ wakeup-source;
++ };
++};
++
++&i2c7 {
++ status = "okay";
++
++ es8316: audio-codec@11 {
++ compatible = "everest,es8316";
++ reg = <0x11>;
++ clocks = <&cru I2S0_8CH_MCLKOUT>;
++ clock-names = "mclk";
++ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
++ assigned-clock-rates = <12288000>;
++ #sound-dai-cells = <0>;
++
++ port {
++ es8316_p0_0: endpoint {
++ remote-endpoint = <&i2s0_8ch_p0_0>;
++ };
++ };
++ };
++};
++
++&i2s0_8ch {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s0_lrck
++ &i2s0_mclk
++ &i2s0_sclk
++ &i2s0_sdi0
++ &i2s0_sdo0>;
++ status = "okay";
++
++ i2s0_8ch_p0: port {
++ i2s0_8ch_p0_0: endpoint {
++ dai-format = "i2s";
++ mclk-fs = <256>;
++ remote-endpoint = <&es8316_p0_0>;
++ };
++ };
++};
++
++&i2s5_8ch {
++ status = "okay";
++};
++
++&i2s6_8ch {
++ status = "okay";
++};
++
++&package_thermal {
++ polling-delay = <1000>;
++
++ trips {
++ package_fan0: package-fan0 {
++ temperature = <55000>;
++ hysteresis = <2000>;
++ type = "active";
++ };
++
++ package_fan1: package-fan1 {
++ temperature = <65000>;
++ hysteresis = <2000>;
++ type = "active";
++ };
++ };
++
++ cooling-maps {
++ map0 {
++ trip = <&package_fan0>;
++ cooling-device = <&fan THERMAL_NO_LIMIT 1>;
++ };
++
++ map1 {
++ trip = <&package_fan1>;
++ cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
++ };
++ };
++};
++
++&pcie2x1l0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie2_0_rst>;
++ reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
++ vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
++ status = "okay";
++};
++
++&pcie2x1l2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie2_2_rst>;
++ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
++ vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
++ status = "okay";
++};
++
++&pcie30phy {
++ status = "okay";
++};
++
++&pcie3x4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie3_rst>;
++ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
++ vpcie3v3-supply = <&vcc3v3_pcie30>;
++ status = "okay";
++};
++
++&pd_gpu {
++ domain-supply = <&vdd_gpu_s0>;
++};
++
++&pinctrl {
++ hdmirx {
++ hdmirx_hpd: hdmirx-5v-detection {
++ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ hym8563 {
++ hym8563_int: hym8563-int {
++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ leds {
++ led_rgb_b: led-rgb-b {
++ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ sound {
++ hp_detect: hp-detect {
++ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pcie2 {
++ pcie2_0_rst: pcie2-0-rst {
++ rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
++ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ pcie2_2_rst: pcie2-2-rst {
++ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pcie3 {
++ pcie3_rst: pcie3-rst {
++ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ pcie3_vcc3v3_en: pcie3-vcc3v3-en {
++ rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++};
++
++&pwm1 {
++ status = "okay";
++};
++
++&saradc {
++ vref-supply = <&avcc_1v8_s0>;
++ status = "okay";
++};
++
++&sdhci {
++ bus-width = <8>;
++ no-sdio;
++ no-sd;
++ non-removable;
++ mmc-hs400-1_8v;
++ mmc-hs400-enhanced-strobe;
++ status = "okay";
++};
++
++&sdmmc {
++ max-frequency = <200000000>;
++ no-sdio;
++ no-mmc;
++ bus-width = <4>;
++ cap-mmc-highspeed;
++ cap-sd-highspeed;
++ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
++ disable-wp;
++ sd-uhs-sdr104;
++ vmmc-supply = <&vcc_3v3_s3>;
++ vqmmc-supply = <&vccio_sd_s0>;
++ status = "okay";
++};
++
++&sfc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&fspim2_pins>;
++ status = "okay";
++
++ flash@0 {
++ compatible = "jedec,spi-nor";
++ reg = <0>;
++ spi-max-frequency = <104000000>;
++ spi-rx-bus-width = <4>;
++ spi-tx-bus-width = <1>;
++ vcc-supply = <&vcc_3v3_s3>;
++ };
++};
++
++&spi2 {
++ status = "okay";
++ assigned-clocks = <&cru CLK_SPI2>;
++ assigned-clock-rates = <200000000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
++ num-cs = <1>;
++
++ pmic@0 {
++ compatible = "rockchip,rk806";
++ spi-max-frequency = <1000000>;
++ reg = <0x0>;
++
++ interrupt-parent = <&gpio0>;
++ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
++
++ pinctrl-names = "default";
++ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
++ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
++
++ system-power-controller;
++
++ vcc1-supply = <&vcc5v0_sys>;
++ vcc2-supply = <&vcc5v0_sys>;
++ vcc3-supply = <&vcc5v0_sys>;
++ vcc4-supply = <&vcc5v0_sys>;
++ vcc5-supply = <&vcc5v0_sys>;
++ vcc6-supply = <&vcc5v0_sys>;
++ vcc7-supply = <&vcc5v0_sys>;
++ vcc8-supply = <&vcc5v0_sys>;
++ vcc9-supply = <&vcc5v0_sys>;
++ vcc10-supply = <&vcc5v0_sys>;
++ vcc11-supply = <&vcc_2v0_pldo_s3>;
++ vcc12-supply = <&vcc5v0_sys>;
++ vcc13-supply = <&vcc_1v1_nldo_s3>;
++ vcc14-supply = <&vcc_1v1_nldo_s3>;
++ vcca-supply = <&vcc5v0_sys>;
++
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ rk806_dvs1_null: dvs1-null-pins {
++ pins = "gpio_pwrctrl1";
++ function = "pin_fun0";
++ };
++
++ rk806_dvs2_null: dvs2-null-pins {
++ pins = "gpio_pwrctrl2";
++ function = "pin_fun0";
++ };
++
++ rk806_dvs3_null: dvs3-null-pins {
++ pins = "gpio_pwrctrl3";
++ function = "pin_fun0";
++ };
++
++ regulators {
++ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
++ regulator-boot-on;
++ regulator-min-microvolt = <550000>;
++ regulator-max-microvolt = <950000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vdd_gpu_s0";
++ regulator-enable-ramp-delay = <400>;
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <550000>;
++ regulator-max-microvolt = <950000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vdd_cpu_lit_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_log_s0: dcdc-reg3 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <675000>;
++ regulator-max-microvolt = <750000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vdd_log_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ regulator-suspend-microvolt = <750000>;
++ };
++ };
++
++ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <550000>;
++ regulator-max-microvolt = <950000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vdd_vdenc_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_ddr_s0: dcdc-reg5 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <675000>;
++ regulator-max-microvolt = <900000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vdd_ddr_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ regulator-suspend-microvolt = <850000>;
++ };
++ };
++
++ vdd2_ddr_s3: dcdc-reg6 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-name = "vdd2_ddr_s3";
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ };
++ };
++
++ vcc_2v0_pldo_s3: dcdc-reg7 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <2000000>;
++ regulator-max-microvolt = <2000000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vdd_2v0_pldo_s3";
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <2000000>;
++ };
++ };
++
++ vcc_3v3_s3: dcdc-reg8 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc_3v3_s3";
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <3300000>;
++ };
++ };
++
++ vddq_ddr_s0: dcdc-reg9 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-name = "vddq_ddr_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc_1v8_s3: dcdc-reg10 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "vcc_1v8_s3";
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ avcc_1v8_s0: pldo-reg1 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "avcc_1v8_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc_1v8_s0: pldo-reg2 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "vcc_1v8_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ avdd_1v2_s0: pldo-reg3 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1200000>;
++ regulator-name = "avdd_1v2_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc_3v3_s0: pldo-reg4 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vcc_3v3_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vccio_sd_s0: pldo-reg5 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vccio_sd_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ pldo6_s3: pldo-reg6 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "pldo6_s3";
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ vdd_0v75_s3: nldo-reg1 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <750000>;
++ regulator-max-microvolt = <750000>;
++ regulator-name = "vdd_0v75_s3";
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <750000>;
++ };
++ };
++
++ vdd_ddr_pll_s0: nldo-reg2 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <850000>;
++ regulator-max-microvolt = <850000>;
++ regulator-name = "vdd_ddr_pll_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ regulator-suspend-microvolt = <850000>;
++ };
++ };
++
++ avdd_0v75_s0: nldo-reg3 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <750000>;
++ regulator-max-microvolt = <750000>;
++ regulator-name = "avdd_0v75_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_0v85_s0: nldo-reg4 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <850000>;
++ regulator-max-microvolt = <850000>;
++ regulator-name = "vdd_0v85_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_0v75_s0: nldo-reg5 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <750000>;
++ regulator-max-microvolt = <750000>;
++ regulator-name = "vdd_0v75_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++ };
++ };
++};
++
++&tsadc {
++ status = "okay";
++};
++
++&uart2 {
++ pinctrl-0 = <&uart2m0_xfer>;
++ status = "okay";
++};
++
++&u2phy1 {
++ status = "okay";
++};
++
++&u2phy1_otg {
++ status = "okay";
++};
++
++&u2phy2 {
++ status = "okay";
++};
++
++&u2phy2_host {
++ /* connected to USB hub, which is powered by vcc5v0_sys */
++ phy-supply = <&vcc5v0_sys>;
++ status = "okay";
++};
++
++&u2phy3 {
++ status = "okay";
++};
++
++&u2phy3_host {
++ phy-supply = <&vcc5v0_host>;
++ status = "okay";
++};
++
++&usbdp_phy1 {
++ status = "okay";
++};
++
++&usb_host0_ehci {
++ status = "okay";
++};
++
++&usb_host0_ohci {
++ status = "okay";
++};
++
++&usb_host1_ehci {
++ status = "okay";
++};
++
++&usb_host1_ohci {
++ status = "okay";
++};
++
++&usb_host1_xhci {
++ dr_mode = "host";
++ status = "okay";
++};
++
++&usb_host2_xhci {
++ status = "okay";
++};
++
++&vop {
++ status = "okay";
++};
++
++&vop_mmu {
++ status = "okay";
++};
++
++&vp0 {
++ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
++ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
++ remote-endpoint = <&hdmi0_in_vp0>;
++ };
++};
++
++&vp1 {
++ vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {
++ reg = <ROCKCHIP_VOP2_EP_HDMI1>;
++ remote-endpoint = <&hdmi1_in_vp1>;
++ };
++};
--- /dev/null
+From 376cb9696298df2028afb620a9dc6c4b10a18605 Mon Sep 17 00:00:00 2001
+Date: Thu, 8 May 2025 19:48:53 +0200
+Subject: arm64: dts: rockchip: add Rock 5B+
+
+Add ROCK 5B+, which is an improved version of the ROCK 5B with the
+following changes:
+
+ * Memory LPDDR4X -> LPDDR5
+ * HDMI input connector size
+ * eMMC socket -> onboard
+ * M.2 E-Key is replaced by onboard RTL8852BE WLAN/BT
+ * M.2 M-Key 1x4 lanes is replaced by 2x2 lanes
+ * Added M.2 B-Key for USB connected WWAN modules (untested)
+ * Add second camera port (not yet supported in upstream Linux)
+ * Add dedicated USB-C port for device power (no impact in DT;
+ the existing port has not been changed and the new port is
+ handled by CH224D standalone chip)
+
+
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -142,6 +142,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ro
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtbo
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtbo
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-plus.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-toybrick-x0.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-turing-rk1.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
+@@ -0,0 +1,113 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++
++#include "rk3588-rock-5b.dtsi"
++
++/ {
++ model = "Radxa ROCK 5B+";
++ compatible = "radxa,rock-5b-plus", "rockchip,rk3588";
++
++ rfkill-wwan {
++ compatible = "rfkill-gpio";
++ label = "rfkill-m2-wwan";
++ radio-type = "wwan";
++ shutdown-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
++ };
++
++ vcc3v3_4g: regulator-vcc3v3-4g {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
++ /* pinctrl for the GPIO is requested by vcc3v3_pcie2x1l0 */
++ regulator-name = "vcc3v3_4g";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ startup-delay-us = <50000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc3v3_wwan_pwr: regulator-vcc3v3-wwan {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&wwan_power_en>;
++ regulator-name = "vcc3v3_wwan_pwr";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ vin-supply = <&vcc3v3_4g>;
++ };
++};
++
++&gpio0 {
++ wwan-disable2-n-hog {
++ gpios = <RK_PB2 GPIO_ACTIVE_LOW>;
++ output-low;
++ line-name = "M.2 B-key W_DISABLE2#";
++ gpio-hog;
++ };
++};
++
++&gpio2 {
++ wwan-reset-n-hog {
++ gpios = <RK_PB3 GPIO_ACTIVE_LOW>;
++ output-low;
++ line-name = "M.2 B-key RESET#";
++ gpio-hog;
++ };
++
++ wwan-wake-n-hog {
++ gpios = <RK_PB2 GPIO_ACTIVE_LOW>;
++ input;
++ line-name = "M.2 B-key WoWWAN#";
++ gpio-hog;
++ };
++};
++
++&pcie30phy {
++ data-lanes = <1 1 2 2>;
++};
++
++&pcie3x2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie3x2_rst>;
++ reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
++ vpcie3v3-supply = <&vcc3v3_pcie30>;
++ status = "okay";
++};
++
++&pcie3x4 {
++ num-lanes = <2>;
++};
++
++&pinctrl {
++ wwan {
++ wwan_power_en: wwan-pwr-en {
++ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pcie3 {
++ pcie3x2_rst: pcie3x2-rst {
++ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ usb {
++ vcc5v0_host_en: vcc5v0-host-en {
++ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++};
++
++&vcc5v0_host {
++ enable-active-high;
++ gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&vcc5v0_host_en>;
++};
--- /dev/null
+From 8b76abf78321ea3361c01e849c8dc3a6793c05d6 Mon Sep 17 00:00:00 2001
+Date: Tue, 20 May 2025 20:50:09 +0200
+Subject: arm64: dts: rockchip: rename rk3588-rock-5b.dtsi
+
+As subsequent patches will add ROCK 5T support, rename the .dtsi file to
+reflect that it's shared between ROCK 5B, ROCK 5B+ and ROCK 5T.
+
+This is done separately from moving the 5B and 5B+ only nodes to a
+common tree so that the history stays bisectable and the diff easily
+reviewable.
+
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
+@@ -2,7 +2,7 @@
+
+ /dts-v1/;
+
+-#include "rk3588-rock-5b.dtsi"
++#include "rk3588-rock-5b-5bp-5t.dtsi"
+
+ / {
+ model = "Radxa ROCK 5B+";
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -2,7 +2,7 @@
+
+ /dts-v1/;
+
+-#include "rk3588-rock-5b.dtsi"
++#include "rk3588-rock-5b-5bp-5t.dtsi"
+
+ / {
+ model = "Radxa ROCK 5B";
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
+@@ -0,0 +1,945 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/leds/common.h>
++#include <dt-bindings/soc/rockchip,vop2.h>
++#include "rk3588.dtsi"
++
++/ {
++ aliases {
++ mmc0 = &sdhci;
++ mmc1 = &sdmmc;
++ mmc2 = &sdio;
++ };
++
++ chosen {
++ stdout-path = "serial2:1500000n8";
++ };
++
++ analog-sound {
++ compatible = "audio-graph-card";
++ label = "rk3588-es8316";
++
++ widgets = "Microphone", "Mic Jack",
++ "Headphone", "Headphones";
++
++ routing = "MIC2", "Mic Jack",
++ "Headphones", "HPOL",
++ "Headphones", "HPOR";
++
++ dais = <&i2s0_8ch_p0>;
++ hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&hp_detect>;
++ };
++
++ hdmi0-con {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi0_con_in: endpoint {
++ remote-endpoint = <&hdmi0_out_con>;
++ };
++ };
++ };
++
++ hdmi1-con {
++ compatible = "hdmi-connector";
++ type = "a";
++
++ port {
++ hdmi1_con_in: endpoint {
++ remote-endpoint = <&hdmi1_out_con>;
++ };
++ };
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&led_rgb_b>;
++
++ led_rgb_b {
++ function = LED_FUNCTION_STATUS;
++ color = <LED_COLOR_ID_BLUE>;
++ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
++ fan: pwm-fan {
++ compatible = "pwm-fan";
++ cooling-levels = <0 120 150 180 210 240 255>;
++ fan-supply = <&vcc5v0_sys>;
++ pwms = <&pwm1 0 50000 0>;
++ #cooling-cells = <2>;
++ };
++
++ rfkill {
++ compatible = "rfkill-gpio";
++ label = "rfkill-m2-wlan";
++ radio-type = "wlan";
++ shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
++ };
++
++ rfkill-bt {
++ compatible = "rfkill-gpio";
++ label = "rfkill-m2-bt";
++ radio-type = "bluetooth";
++ shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
++ };
++
++ vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie2_0_vcc3v3_en>;
++ regulator-name = "vcc3v3_pcie2x1l0";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ startup-delay-us = <50000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc3v3_pcie2x1l2";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ startup-delay-us = <5000>;
++ vin-supply = <&vcc_3v3_s3>;
++ };
++
++ vcc3v3_pcie30: regulator-vcc3v3-pcie30 {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie3_vcc3v3_en>;
++ regulator-name = "vcc3v3_pcie30";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ startup-delay-us = <5000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc5v0_host: regulator-vcc5v0-host {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc5v0_host";
++ regulator-boot-on;
++ regulator-always-on;
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc5v0_sys: regulator-vcc5v0-sys {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc5v0_sys";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ };
++
++ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc_1v1_nldo_s3";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1100000>;
++ regulator-max-microvolt = <1100000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++};
++
++&combphy0_ps {
++ status = "okay";
++};
++
++&combphy1_ps {
++ status = "okay";
++};
++
++&combphy2_psu {
++ status = "okay";
++};
++
++&cpu_b0 {
++ cpu-supply = <&vdd_cpu_big0_s0>;
++};
++
++&cpu_b1 {
++ cpu-supply = <&vdd_cpu_big0_s0>;
++};
++
++&cpu_b2 {
++ cpu-supply = <&vdd_cpu_big1_s0>;
++};
++
++&cpu_b3 {
++ cpu-supply = <&vdd_cpu_big1_s0>;
++};
++
++&cpu_l0 {
++ cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l1 {
++ cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l2 {
++ cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l3 {
++ cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&gpu {
++ mali-supply = <&vdd_gpu_s0>;
++ status = "okay";
++};
++
++&hdmi0 {
++ status = "okay";
++};
++
++&hdmi0_in {
++ hdmi0_in_vp0: endpoint {
++ remote-endpoint = <&vp0_out_hdmi0>;
++ };
++};
++
++&hdmi0_out {
++ hdmi0_out_con: endpoint {
++ remote-endpoint = <&hdmi0_con_in>;
++ };
++};
++
++&hdmi0_sound {
++ status = "okay";
++};
++
++&hdmi1 {
++ pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
++ &hdmim1_tx1_scl &hdmim1_tx1_sda>;
++ status = "okay";
++};
++
++&hdmi1_in {
++ hdmi1_in_vp1: endpoint {
++ remote-endpoint = <&vp1_out_hdmi1>;
++ };
++};
++
++&hdmi1_out {
++ hdmi1_out_con: endpoint {
++ remote-endpoint = <&hdmi1_con_in>;
++ };
++};
++
++&hdmi1_sound {
++ status = "okay";
++};
++
++&hdmi_receiver_cma {
++ status = "okay";
++};
++
++&hdmi_receiver {
++ hpd-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
++ pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>;
++ pinctrl-names = "default";
++ status = "okay";
++};
++
++&hdptxphy0 {
++ status = "okay";
++};
++
++&hdptxphy1 {
++ status = "okay";
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0m2_xfer>;
++ status = "okay";
++
++ vdd_cpu_big0_s0: regulator@42 {
++ compatible = "rockchip,rk8602";
++ reg = <0x42>;
++ fcs,suspend-voltage-selector = <1>;
++ regulator-name = "vdd_cpu_big0_s0";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <550000>;
++ regulator-max-microvolt = <1050000>;
++ regulator-ramp-delay = <2300>;
++ vin-supply = <&vcc5v0_sys>;
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_cpu_big1_s0: regulator@43 {
++ compatible = "rockchip,rk8603", "rockchip,rk8602";
++ reg = <0x43>;
++ fcs,suspend-voltage-selector = <1>;
++ regulator-name = "vdd_cpu_big1_s0";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <550000>;
++ regulator-max-microvolt = <1050000>;
++ regulator-ramp-delay = <2300>;
++ vin-supply = <&vcc5v0_sys>;
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++};
++
++&i2c6 {
++ status = "okay";
++
++ hym8563: rtc@51 {
++ compatible = "haoyu,hym8563";
++ reg = <0x51>;
++ #clock-cells = <0>;
++ clock-output-names = "hym8563";
++ pinctrl-names = "default";
++ pinctrl-0 = <&hym8563_int>;
++ interrupt-parent = <&gpio0>;
++ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
++ wakeup-source;
++ };
++};
++
++&i2c7 {
++ status = "okay";
++
++ es8316: audio-codec@11 {
++ compatible = "everest,es8316";
++ reg = <0x11>;
++ clocks = <&cru I2S0_8CH_MCLKOUT>;
++ clock-names = "mclk";
++ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
++ assigned-clock-rates = <12288000>;
++ #sound-dai-cells = <0>;
++
++ port {
++ es8316_p0_0: endpoint {
++ remote-endpoint = <&i2s0_8ch_p0_0>;
++ };
++ };
++ };
++};
++
++&i2s0_8ch {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s0_lrck
++ &i2s0_mclk
++ &i2s0_sclk
++ &i2s0_sdi0
++ &i2s0_sdo0>;
++ status = "okay";
++
++ i2s0_8ch_p0: port {
++ i2s0_8ch_p0_0: endpoint {
++ dai-format = "i2s";
++ mclk-fs = <256>;
++ remote-endpoint = <&es8316_p0_0>;
++ };
++ };
++};
++
++&i2s5_8ch {
++ status = "okay";
++};
++
++&i2s6_8ch {
++ status = "okay";
++};
++
++&package_thermal {
++ polling-delay = <1000>;
++
++ trips {
++ package_fan0: package-fan0 {
++ temperature = <55000>;
++ hysteresis = <2000>;
++ type = "active";
++ };
++
++ package_fan1: package-fan1 {
++ temperature = <65000>;
++ hysteresis = <2000>;
++ type = "active";
++ };
++ };
++
++ cooling-maps {
++ map0 {
++ trip = <&package_fan0>;
++ cooling-device = <&fan THERMAL_NO_LIMIT 1>;
++ };
++
++ map1 {
++ trip = <&package_fan1>;
++ cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
++ };
++ };
++};
++
++&pcie2x1l0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie2_0_rst>;
++ reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
++ vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
++ status = "okay";
++};
++
++&pcie2x1l2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie2_2_rst>;
++ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
++ vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
++ status = "okay";
++};
++
++&pcie30phy {
++ status = "okay";
++};
++
++&pcie3x4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie3_rst>;
++ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
++ vpcie3v3-supply = <&vcc3v3_pcie30>;
++ status = "okay";
++};
++
++&pd_gpu {
++ domain-supply = <&vdd_gpu_s0>;
++};
++
++&pinctrl {
++ hdmirx {
++ hdmirx_hpd: hdmirx-5v-detection {
++ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ hym8563 {
++ hym8563_int: hym8563-int {
++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ leds {
++ led_rgb_b: led-rgb-b {
++ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ sound {
++ hp_detect: hp-detect {
++ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pcie2 {
++ pcie2_0_rst: pcie2-0-rst {
++ rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
++ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ pcie2_2_rst: pcie2-2-rst {
++ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pcie3 {
++ pcie3_rst: pcie3-rst {
++ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ pcie3_vcc3v3_en: pcie3-vcc3v3-en {
++ rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++};
++
++&pwm1 {
++ status = "okay";
++};
++
++&saradc {
++ vref-supply = <&avcc_1v8_s0>;
++ status = "okay";
++};
++
++&sdhci {
++ bus-width = <8>;
++ no-sdio;
++ no-sd;
++ non-removable;
++ mmc-hs400-1_8v;
++ mmc-hs400-enhanced-strobe;
++ status = "okay";
++};
++
++&sdmmc {
++ max-frequency = <200000000>;
++ no-sdio;
++ no-mmc;
++ bus-width = <4>;
++ cap-mmc-highspeed;
++ cap-sd-highspeed;
++ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
++ disable-wp;
++ sd-uhs-sdr104;
++ vmmc-supply = <&vcc_3v3_s3>;
++ vqmmc-supply = <&vccio_sd_s0>;
++ status = "okay";
++};
++
++&sfc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&fspim2_pins>;
++ status = "okay";
++
++ flash@0 {
++ compatible = "jedec,spi-nor";
++ reg = <0>;
++ spi-max-frequency = <104000000>;
++ spi-rx-bus-width = <4>;
++ spi-tx-bus-width = <1>;
++ vcc-supply = <&vcc_3v3_s3>;
++ };
++};
++
++&spi2 {
++ status = "okay";
++ assigned-clocks = <&cru CLK_SPI2>;
++ assigned-clock-rates = <200000000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
++ num-cs = <1>;
++
++ pmic@0 {
++ compatible = "rockchip,rk806";
++ spi-max-frequency = <1000000>;
++ reg = <0x0>;
++
++ interrupt-parent = <&gpio0>;
++ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
++
++ pinctrl-names = "default";
++ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
++ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
++
++ system-power-controller;
++
++ vcc1-supply = <&vcc5v0_sys>;
++ vcc2-supply = <&vcc5v0_sys>;
++ vcc3-supply = <&vcc5v0_sys>;
++ vcc4-supply = <&vcc5v0_sys>;
++ vcc5-supply = <&vcc5v0_sys>;
++ vcc6-supply = <&vcc5v0_sys>;
++ vcc7-supply = <&vcc5v0_sys>;
++ vcc8-supply = <&vcc5v0_sys>;
++ vcc9-supply = <&vcc5v0_sys>;
++ vcc10-supply = <&vcc5v0_sys>;
++ vcc11-supply = <&vcc_2v0_pldo_s3>;
++ vcc12-supply = <&vcc5v0_sys>;
++ vcc13-supply = <&vcc_1v1_nldo_s3>;
++ vcc14-supply = <&vcc_1v1_nldo_s3>;
++ vcca-supply = <&vcc5v0_sys>;
++
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ rk806_dvs1_null: dvs1-null-pins {
++ pins = "gpio_pwrctrl1";
++ function = "pin_fun0";
++ };
++
++ rk806_dvs2_null: dvs2-null-pins {
++ pins = "gpio_pwrctrl2";
++ function = "pin_fun0";
++ };
++
++ rk806_dvs3_null: dvs3-null-pins {
++ pins = "gpio_pwrctrl3";
++ function = "pin_fun0";
++ };
++
++ regulators {
++ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
++ regulator-boot-on;
++ regulator-min-microvolt = <550000>;
++ regulator-max-microvolt = <950000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vdd_gpu_s0";
++ regulator-enable-ramp-delay = <400>;
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <550000>;
++ regulator-max-microvolt = <950000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vdd_cpu_lit_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_log_s0: dcdc-reg3 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <675000>;
++ regulator-max-microvolt = <750000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vdd_log_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ regulator-suspend-microvolt = <750000>;
++ };
++ };
++
++ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <550000>;
++ regulator-max-microvolt = <950000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vdd_vdenc_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_ddr_s0: dcdc-reg5 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <675000>;
++ regulator-max-microvolt = <900000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vdd_ddr_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ regulator-suspend-microvolt = <850000>;
++ };
++ };
++
++ vdd2_ddr_s3: dcdc-reg6 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-name = "vdd2_ddr_s3";
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ };
++ };
++
++ vcc_2v0_pldo_s3: dcdc-reg7 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <2000000>;
++ regulator-max-microvolt = <2000000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vdd_2v0_pldo_s3";
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <2000000>;
++ };
++ };
++
++ vcc_3v3_s3: dcdc-reg8 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-name = "vcc_3v3_s3";
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <3300000>;
++ };
++ };
++
++ vddq_ddr_s0: dcdc-reg9 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-name = "vddq_ddr_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc_1v8_s3: dcdc-reg10 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "vcc_1v8_s3";
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ avcc_1v8_s0: pldo-reg1 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "avcc_1v8_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc_1v8_s0: pldo-reg2 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "vcc_1v8_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ avdd_1v2_s0: pldo-reg3 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1200000>;
++ regulator-name = "avdd_1v2_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vcc_3v3_s0: pldo-reg4 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vcc_3v3_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vccio_sd_s0: pldo-reg5 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-ramp-delay = <12500>;
++ regulator-name = "vccio_sd_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ pldo6_s3: pldo-reg6 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-name = "pldo6_s3";
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <1800000>;
++ };
++ };
++
++ vdd_0v75_s3: nldo-reg1 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <750000>;
++ regulator-max-microvolt = <750000>;
++ regulator-name = "vdd_0v75_s3";
++
++ regulator-state-mem {
++ regulator-on-in-suspend;
++ regulator-suspend-microvolt = <750000>;
++ };
++ };
++
++ vdd_ddr_pll_s0: nldo-reg2 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <850000>;
++ regulator-max-microvolt = <850000>;
++ regulator-name = "vdd_ddr_pll_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ regulator-suspend-microvolt = <850000>;
++ };
++ };
++
++ avdd_0v75_s0: nldo-reg3 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <750000>;
++ regulator-max-microvolt = <750000>;
++ regulator-name = "avdd_0v75_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_0v85_s0: nldo-reg4 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <850000>;
++ regulator-max-microvolt = <850000>;
++ regulator-name = "vdd_0v85_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++
++ vdd_0v75_s0: nldo-reg5 {
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <750000>;
++ regulator-max-microvolt = <750000>;
++ regulator-name = "vdd_0v75_s0";
++
++ regulator-state-mem {
++ regulator-off-in-suspend;
++ };
++ };
++ };
++ };
++};
++
++&tsadc {
++ status = "okay";
++};
++
++&uart2 {
++ pinctrl-0 = <&uart2m0_xfer>;
++ status = "okay";
++};
++
++&u2phy1 {
++ status = "okay";
++};
++
++&u2phy1_otg {
++ status = "okay";
++};
++
++&u2phy2 {
++ status = "okay";
++};
++
++&u2phy2_host {
++ /* connected to USB hub, which is powered by vcc5v0_sys */
++ phy-supply = <&vcc5v0_sys>;
++ status = "okay";
++};
++
++&u2phy3 {
++ status = "okay";
++};
++
++&u2phy3_host {
++ phy-supply = <&vcc5v0_host>;
++ status = "okay";
++};
++
++&usbdp_phy1 {
++ status = "okay";
++};
++
++&usb_host0_ehci {
++ status = "okay";
++};
++
++&usb_host0_ohci {
++ status = "okay";
++};
++
++&usb_host1_ehci {
++ status = "okay";
++};
++
++&usb_host1_ohci {
++ status = "okay";
++};
++
++&usb_host1_xhci {
++ dr_mode = "host";
++ status = "okay";
++};
++
++&usb_host2_xhci {
++ status = "okay";
++};
++
++&vop {
++ status = "okay";
++};
++
++&vop_mmu {
++ status = "okay";
++};
++
++&vp0 {
++ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
++ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
++ remote-endpoint = <&hdmi0_in_vp0>;
++ };
++};
++
++&vp1 {
++ vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {
++ reg = <ROCKCHIP_VOP2_EP_HDMI1>;
++ remote-endpoint = <&hdmi1_in_vp1>;
++ };
++};
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
++++ /dev/null
+@@ -1,945 +0,0 @@
+-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+-
+-/dts-v1/;
+-
+-#include <dt-bindings/gpio/gpio.h>
+-#include <dt-bindings/leds/common.h>
+-#include <dt-bindings/soc/rockchip,vop2.h>
+-#include "rk3588.dtsi"
+-
+-/ {
+- aliases {
+- mmc0 = &sdhci;
+- mmc1 = &sdmmc;
+- mmc2 = &sdio;
+- };
+-
+- chosen {
+- stdout-path = "serial2:1500000n8";
+- };
+-
+- analog-sound {
+- compatible = "audio-graph-card";
+- label = "rk3588-es8316";
+-
+- widgets = "Microphone", "Mic Jack",
+- "Headphone", "Headphones";
+-
+- routing = "MIC2", "Mic Jack",
+- "Headphones", "HPOL",
+- "Headphones", "HPOR";
+-
+- dais = <&i2s0_8ch_p0>;
+- hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&hp_detect>;
+- };
+-
+- hdmi0-con {
+- compatible = "hdmi-connector";
+- type = "a";
+-
+- port {
+- hdmi0_con_in: endpoint {
+- remote-endpoint = <&hdmi0_out_con>;
+- };
+- };
+- };
+-
+- hdmi1-con {
+- compatible = "hdmi-connector";
+- type = "a";
+-
+- port {
+- hdmi1_con_in: endpoint {
+- remote-endpoint = <&hdmi1_out_con>;
+- };
+- };
+- };
+-
+- leds {
+- compatible = "gpio-leds";
+- pinctrl-names = "default";
+- pinctrl-0 = <&led_rgb_b>;
+-
+- led_rgb_b {
+- function = LED_FUNCTION_STATUS;
+- color = <LED_COLOR_ID_BLUE>;
+- gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+- linux,default-trigger = "heartbeat";
+- };
+- };
+-
+- fan: pwm-fan {
+- compatible = "pwm-fan";
+- cooling-levels = <0 120 150 180 210 240 255>;
+- fan-supply = <&vcc5v0_sys>;
+- pwms = <&pwm1 0 50000 0>;
+- #cooling-cells = <2>;
+- };
+-
+- rfkill {
+- compatible = "rfkill-gpio";
+- label = "rfkill-m2-wlan";
+- radio-type = "wlan";
+- shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+- };
+-
+- rfkill-bt {
+- compatible = "rfkill-gpio";
+- label = "rfkill-m2-bt";
+- radio-type = "bluetooth";
+- shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
+- };
+-
+- vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
+- compatible = "regulator-fixed";
+- enable-active-high;
+- gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pcie2_0_vcc3v3_en>;
+- regulator-name = "vcc3v3_pcie2x1l0";
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- startup-delay-us = <50000>;
+- vin-supply = <&vcc5v0_sys>;
+- };
+-
+- vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 {
+- compatible = "regulator-fixed";
+- regulator-name = "vcc3v3_pcie2x1l2";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- startup-delay-us = <5000>;
+- vin-supply = <&vcc_3v3_s3>;
+- };
+-
+- vcc3v3_pcie30: regulator-vcc3v3-pcie30 {
+- compatible = "regulator-fixed";
+- enable-active-high;
+- gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pcie3_vcc3v3_en>;
+- regulator-name = "vcc3v3_pcie30";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- startup-delay-us = <5000>;
+- vin-supply = <&vcc5v0_sys>;
+- };
+-
+- vcc5v0_host: regulator-vcc5v0-host {
+- compatible = "regulator-fixed";
+- regulator-name = "vcc5v0_host";
+- regulator-boot-on;
+- regulator-always-on;
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- vin-supply = <&vcc5v0_sys>;
+- };
+-
+- vcc5v0_sys: regulator-vcc5v0-sys {
+- compatible = "regulator-fixed";
+- regulator-name = "vcc5v0_sys";
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- };
+-
+- vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
+- compatible = "regulator-fixed";
+- regulator-name = "vcc_1v1_nldo_s3";
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1100000>;
+- regulator-max-microvolt = <1100000>;
+- vin-supply = <&vcc5v0_sys>;
+- };
+-};
+-
+-&combphy0_ps {
+- status = "okay";
+-};
+-
+-&combphy1_ps {
+- status = "okay";
+-};
+-
+-&combphy2_psu {
+- status = "okay";
+-};
+-
+-&cpu_b0 {
+- cpu-supply = <&vdd_cpu_big0_s0>;
+-};
+-
+-&cpu_b1 {
+- cpu-supply = <&vdd_cpu_big0_s0>;
+-};
+-
+-&cpu_b2 {
+- cpu-supply = <&vdd_cpu_big1_s0>;
+-};
+-
+-&cpu_b3 {
+- cpu-supply = <&vdd_cpu_big1_s0>;
+-};
+-
+-&cpu_l0 {
+- cpu-supply = <&vdd_cpu_lit_s0>;
+-};
+-
+-&cpu_l1 {
+- cpu-supply = <&vdd_cpu_lit_s0>;
+-};
+-
+-&cpu_l2 {
+- cpu-supply = <&vdd_cpu_lit_s0>;
+-};
+-
+-&cpu_l3 {
+- cpu-supply = <&vdd_cpu_lit_s0>;
+-};
+-
+-&gpu {
+- mali-supply = <&vdd_gpu_s0>;
+- status = "okay";
+-};
+-
+-&hdmi0 {
+- status = "okay";
+-};
+-
+-&hdmi0_in {
+- hdmi0_in_vp0: endpoint {
+- remote-endpoint = <&vp0_out_hdmi0>;
+- };
+-};
+-
+-&hdmi0_out {
+- hdmi0_out_con: endpoint {
+- remote-endpoint = <&hdmi0_con_in>;
+- };
+-};
+-
+-&hdmi0_sound {
+- status = "okay";
+-};
+-
+-&hdmi1 {
+- pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
+- &hdmim1_tx1_scl &hdmim1_tx1_sda>;
+- status = "okay";
+-};
+-
+-&hdmi1_in {
+- hdmi1_in_vp1: endpoint {
+- remote-endpoint = <&vp1_out_hdmi1>;
+- };
+-};
+-
+-&hdmi1_out {
+- hdmi1_out_con: endpoint {
+- remote-endpoint = <&hdmi1_con_in>;
+- };
+-};
+-
+-&hdmi1_sound {
+- status = "okay";
+-};
+-
+-&hdmi_receiver_cma {
+- status = "okay";
+-};
+-
+-&hdmi_receiver {
+- hpd-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
+- pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>;
+- pinctrl-names = "default";
+- status = "okay";
+-};
+-
+-&hdptxphy0 {
+- status = "okay";
+-};
+-
+-&hdptxphy1 {
+- status = "okay";
+-};
+-
+-&i2c0 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&i2c0m2_xfer>;
+- status = "okay";
+-
+- vdd_cpu_big0_s0: regulator@42 {
+- compatible = "rockchip,rk8602";
+- reg = <0x42>;
+- fcs,suspend-voltage-selector = <1>;
+- regulator-name = "vdd_cpu_big0_s0";
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <550000>;
+- regulator-max-microvolt = <1050000>;
+- regulator-ramp-delay = <2300>;
+- vin-supply = <&vcc5v0_sys>;
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vdd_cpu_big1_s0: regulator@43 {
+- compatible = "rockchip,rk8603", "rockchip,rk8602";
+- reg = <0x43>;
+- fcs,suspend-voltage-selector = <1>;
+- regulator-name = "vdd_cpu_big1_s0";
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <550000>;
+- regulator-max-microvolt = <1050000>;
+- regulator-ramp-delay = <2300>;
+- vin-supply = <&vcc5v0_sys>;
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-};
+-
+-&i2c6 {
+- status = "okay";
+-
+- hym8563: rtc@51 {
+- compatible = "haoyu,hym8563";
+- reg = <0x51>;
+- #clock-cells = <0>;
+- clock-output-names = "hym8563";
+- pinctrl-names = "default";
+- pinctrl-0 = <&hym8563_int>;
+- interrupt-parent = <&gpio0>;
+- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+- wakeup-source;
+- };
+-};
+-
+-&i2c7 {
+- status = "okay";
+-
+- es8316: audio-codec@11 {
+- compatible = "everest,es8316";
+- reg = <0x11>;
+- clocks = <&cru I2S0_8CH_MCLKOUT>;
+- clock-names = "mclk";
+- assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
+- assigned-clock-rates = <12288000>;
+- #sound-dai-cells = <0>;
+-
+- port {
+- es8316_p0_0: endpoint {
+- remote-endpoint = <&i2s0_8ch_p0_0>;
+- };
+- };
+- };
+-};
+-
+-&i2s0_8ch {
+- pinctrl-names = "default";
+- pinctrl-0 = <&i2s0_lrck
+- &i2s0_mclk
+- &i2s0_sclk
+- &i2s0_sdi0
+- &i2s0_sdo0>;
+- status = "okay";
+-
+- i2s0_8ch_p0: port {
+- i2s0_8ch_p0_0: endpoint {
+- dai-format = "i2s";
+- mclk-fs = <256>;
+- remote-endpoint = <&es8316_p0_0>;
+- };
+- };
+-};
+-
+-&i2s5_8ch {
+- status = "okay";
+-};
+-
+-&i2s6_8ch {
+- status = "okay";
+-};
+-
+-&package_thermal {
+- polling-delay = <1000>;
+-
+- trips {
+- package_fan0: package-fan0 {
+- temperature = <55000>;
+- hysteresis = <2000>;
+- type = "active";
+- };
+-
+- package_fan1: package-fan1 {
+- temperature = <65000>;
+- hysteresis = <2000>;
+- type = "active";
+- };
+- };
+-
+- cooling-maps {
+- map0 {
+- trip = <&package_fan0>;
+- cooling-device = <&fan THERMAL_NO_LIMIT 1>;
+- };
+-
+- map1 {
+- trip = <&package_fan1>;
+- cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
+- };
+- };
+-};
+-
+-&pcie2x1l0 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pcie2_0_rst>;
+- reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
+- vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
+- status = "okay";
+-};
+-
+-&pcie2x1l2 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pcie2_2_rst>;
+- reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
+- vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
+- status = "okay";
+-};
+-
+-&pcie30phy {
+- status = "okay";
+-};
+-
+-&pcie3x4 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pcie3_rst>;
+- reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+- vpcie3v3-supply = <&vcc3v3_pcie30>;
+- status = "okay";
+-};
+-
+-&pd_gpu {
+- domain-supply = <&vdd_gpu_s0>;
+-};
+-
+-&pinctrl {
+- hdmirx {
+- hdmirx_hpd: hdmirx-5v-detection {
+- rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+- hym8563 {
+- hym8563_int: hym8563-int {
+- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+- leds {
+- led_rgb_b: led-rgb-b {
+- rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+- sound {
+- hp_detect: hp-detect {
+- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+- pcie2 {
+- pcie2_0_rst: pcie2-0-rst {
+- rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+-
+- pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
+- rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+-
+- pcie2_2_rst: pcie2-2-rst {
+- rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+- pcie3 {
+- pcie3_rst: pcie3-rst {
+- rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+-
+- pcie3_vcc3v3_en: pcie3-vcc3v3-en {
+- rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-};
+-
+-&pwm1 {
+- status = "okay";
+-};
+-
+-&saradc {
+- vref-supply = <&avcc_1v8_s0>;
+- status = "okay";
+-};
+-
+-&sdhci {
+- bus-width = <8>;
+- no-sdio;
+- no-sd;
+- non-removable;
+- mmc-hs400-1_8v;
+- mmc-hs400-enhanced-strobe;
+- status = "okay";
+-};
+-
+-&sdmmc {
+- max-frequency = <200000000>;
+- no-sdio;
+- no-mmc;
+- bus-width = <4>;
+- cap-mmc-highspeed;
+- cap-sd-highspeed;
+- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+- disable-wp;
+- sd-uhs-sdr104;
+- vmmc-supply = <&vcc_3v3_s3>;
+- vqmmc-supply = <&vccio_sd_s0>;
+- status = "okay";
+-};
+-
+-&sfc {
+- pinctrl-names = "default";
+- pinctrl-0 = <&fspim2_pins>;
+- status = "okay";
+-
+- flash@0 {
+- compatible = "jedec,spi-nor";
+- reg = <0>;
+- spi-max-frequency = <104000000>;
+- spi-rx-bus-width = <4>;
+- spi-tx-bus-width = <1>;
+- vcc-supply = <&vcc_3v3_s3>;
+- };
+-};
+-
+-&spi2 {
+- status = "okay";
+- assigned-clocks = <&cru CLK_SPI2>;
+- assigned-clock-rates = <200000000>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+- num-cs = <1>;
+-
+- pmic@0 {
+- compatible = "rockchip,rk806";
+- spi-max-frequency = <1000000>;
+- reg = <0x0>;
+-
+- interrupt-parent = <&gpio0>;
+- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+-
+- pinctrl-names = "default";
+- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+-
+- system-power-controller;
+-
+- vcc1-supply = <&vcc5v0_sys>;
+- vcc2-supply = <&vcc5v0_sys>;
+- vcc3-supply = <&vcc5v0_sys>;
+- vcc4-supply = <&vcc5v0_sys>;
+- vcc5-supply = <&vcc5v0_sys>;
+- vcc6-supply = <&vcc5v0_sys>;
+- vcc7-supply = <&vcc5v0_sys>;
+- vcc8-supply = <&vcc5v0_sys>;
+- vcc9-supply = <&vcc5v0_sys>;
+- vcc10-supply = <&vcc5v0_sys>;
+- vcc11-supply = <&vcc_2v0_pldo_s3>;
+- vcc12-supply = <&vcc5v0_sys>;
+- vcc13-supply = <&vcc_1v1_nldo_s3>;
+- vcc14-supply = <&vcc_1v1_nldo_s3>;
+- vcca-supply = <&vcc5v0_sys>;
+-
+- gpio-controller;
+- #gpio-cells = <2>;
+-
+- rk806_dvs1_null: dvs1-null-pins {
+- pins = "gpio_pwrctrl1";
+- function = "pin_fun0";
+- };
+-
+- rk806_dvs2_null: dvs2-null-pins {
+- pins = "gpio_pwrctrl2";
+- function = "pin_fun0";
+- };
+-
+- rk806_dvs3_null: dvs3-null-pins {
+- pins = "gpio_pwrctrl3";
+- function = "pin_fun0";
+- };
+-
+- regulators {
+- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
+- regulator-boot-on;
+- regulator-min-microvolt = <550000>;
+- regulator-max-microvolt = <950000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vdd_gpu_s0";
+- regulator-enable-ramp-delay = <400>;
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <550000>;
+- regulator-max-microvolt = <950000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vdd_cpu_lit_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vdd_log_s0: dcdc-reg3 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <675000>;
+- regulator-max-microvolt = <750000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vdd_log_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- regulator-suspend-microvolt = <750000>;
+- };
+- };
+-
+- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <550000>;
+- regulator-max-microvolt = <950000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vdd_vdenc_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vdd_ddr_s0: dcdc-reg5 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <675000>;
+- regulator-max-microvolt = <900000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vdd_ddr_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- regulator-suspend-microvolt = <850000>;
+- };
+- };
+-
+- vdd2_ddr_s3: dcdc-reg6 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-name = "vdd2_ddr_s3";
+-
+- regulator-state-mem {
+- regulator-on-in-suspend;
+- };
+- };
+-
+- vcc_2v0_pldo_s3: dcdc-reg7 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <2000000>;
+- regulator-max-microvolt = <2000000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vdd_2v0_pldo_s3";
+-
+- regulator-state-mem {
+- regulator-on-in-suspend;
+- regulator-suspend-microvolt = <2000000>;
+- };
+- };
+-
+- vcc_3v3_s3: dcdc-reg8 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-name = "vcc_3v3_s3";
+-
+- regulator-state-mem {
+- regulator-on-in-suspend;
+- regulator-suspend-microvolt = <3300000>;
+- };
+- };
+-
+- vddq_ddr_s0: dcdc-reg9 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-name = "vddq_ddr_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vcc_1v8_s3: dcdc-reg10 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <1800000>;
+- regulator-name = "vcc_1v8_s3";
+-
+- regulator-state-mem {
+- regulator-on-in-suspend;
+- regulator-suspend-microvolt = <1800000>;
+- };
+- };
+-
+- avcc_1v8_s0: pldo-reg1 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <1800000>;
+- regulator-name = "avcc_1v8_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vcc_1v8_s0: pldo-reg2 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <1800000>;
+- regulator-name = "vcc_1v8_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- regulator-suspend-microvolt = <1800000>;
+- };
+- };
+-
+- avdd_1v2_s0: pldo-reg3 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1200000>;
+- regulator-max-microvolt = <1200000>;
+- regulator-name = "avdd_1v2_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vcc_3v3_s0: pldo-reg4 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vcc_3v3_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vccio_sd_s0: pldo-reg5 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-ramp-delay = <12500>;
+- regulator-name = "vccio_sd_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- pldo6_s3: pldo-reg6 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <1800000>;
+- regulator-max-microvolt = <1800000>;
+- regulator-name = "pldo6_s3";
+-
+- regulator-state-mem {
+- regulator-on-in-suspend;
+- regulator-suspend-microvolt = <1800000>;
+- };
+- };
+-
+- vdd_0v75_s3: nldo-reg1 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <750000>;
+- regulator-max-microvolt = <750000>;
+- regulator-name = "vdd_0v75_s3";
+-
+- regulator-state-mem {
+- regulator-on-in-suspend;
+- regulator-suspend-microvolt = <750000>;
+- };
+- };
+-
+- vdd_ddr_pll_s0: nldo-reg2 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <850000>;
+- regulator-max-microvolt = <850000>;
+- regulator-name = "vdd_ddr_pll_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- regulator-suspend-microvolt = <850000>;
+- };
+- };
+-
+- avdd_0v75_s0: nldo-reg3 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <750000>;
+- regulator-max-microvolt = <750000>;
+- regulator-name = "avdd_0v75_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vdd_0v85_s0: nldo-reg4 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <850000>;
+- regulator-max-microvolt = <850000>;
+- regulator-name = "vdd_0v85_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+-
+- vdd_0v75_s0: nldo-reg5 {
+- regulator-always-on;
+- regulator-boot-on;
+- regulator-min-microvolt = <750000>;
+- regulator-max-microvolt = <750000>;
+- regulator-name = "vdd_0v75_s0";
+-
+- regulator-state-mem {
+- regulator-off-in-suspend;
+- };
+- };
+- };
+- };
+-};
+-
+-&tsadc {
+- status = "okay";
+-};
+-
+-&uart2 {
+- pinctrl-0 = <&uart2m0_xfer>;
+- status = "okay";
+-};
+-
+-&u2phy1 {
+- status = "okay";
+-};
+-
+-&u2phy1_otg {
+- status = "okay";
+-};
+-
+-&u2phy2 {
+- status = "okay";
+-};
+-
+-&u2phy2_host {
+- /* connected to USB hub, which is powered by vcc5v0_sys */
+- phy-supply = <&vcc5v0_sys>;
+- status = "okay";
+-};
+-
+-&u2phy3 {
+- status = "okay";
+-};
+-
+-&u2phy3_host {
+- phy-supply = <&vcc5v0_host>;
+- status = "okay";
+-};
+-
+-&usbdp_phy1 {
+- status = "okay";
+-};
+-
+-&usb_host0_ehci {
+- status = "okay";
+-};
+-
+-&usb_host0_ohci {
+- status = "okay";
+-};
+-
+-&usb_host1_ehci {
+- status = "okay";
+-};
+-
+-&usb_host1_ohci {
+- status = "okay";
+-};
+-
+-&usb_host1_xhci {
+- dr_mode = "host";
+- status = "okay";
+-};
+-
+-&usb_host2_xhci {
+- status = "okay";
+-};
+-
+-&vop {
+- status = "okay";
+-};
+-
+-&vop_mmu {
+- status = "okay";
+-};
+-
+-&vp0 {
+- vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+- remote-endpoint = <&hdmi0_in_vp0>;
+- };
+-};
+-
+-&vp1 {
+- vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {
+- reg = <ROCKCHIP_VOP2_EP_HDMI1>;
+- remote-endpoint = <&hdmi1_in_vp1>;
+- };
+-};
--- /dev/null
+From 988035f152709549a095b12fcdcb3cf26cbad63f Mon Sep 17 00:00:00 2001
+Date: Tue, 20 May 2025 20:50:10 +0200
+Subject: arm64: dts: rockchip: move common ROCK 5B/+ nodes into own tree
+
+A few device tree nodes are shared between ROCK 5B and ROCK 5B+ that are
+not shared with ROCK 5T.
+
+Move them into their own device tree include.
+
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
+@@ -18,23 +18,6 @@
+ stdout-path = "serial2:1500000n8";
+ };
+
+- analog-sound {
+- compatible = "audio-graph-card";
+- label = "rk3588-es8316";
+-
+- widgets = "Microphone", "Mic Jack",
+- "Headphone", "Headphones";
+-
+- routing = "MIC2", "Mic Jack",
+- "Headphones", "HPOL",
+- "Headphones", "HPOR";
+-
+- dais = <&i2s0_8ch_p0>;
+- hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&hp_detect>;
+- };
+-
+ hdmi0-con {
+ compatible = "hdmi-connector";
+ type = "a";
+@@ -57,19 +40,6 @@
+ };
+ };
+
+- leds {
+- compatible = "gpio-leds";
+- pinctrl-names = "default";
+- pinctrl-0 = <&led_rgb_b>;
+-
+- led_rgb_b {
+- function = LED_FUNCTION_STATUS;
+- color = <LED_COLOR_ID_BLUE>;
+- gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+- linux,default-trigger = "heartbeat";
+- };
+- };
+-
+ fan: pwm-fan {
+ compatible = "pwm-fan";
+ cooling-levels = <0 120 150 180 210 240 255>;
+@@ -78,13 +48,6 @@
+ #cooling-cells = <2>;
+ };
+
+- rfkill {
+- compatible = "rfkill-gpio";
+- label = "rfkill-m2-wlan";
+- radio-type = "wlan";
+- shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+- };
+-
+ rfkill-bt {
+ compatible = "rfkill-gpio";
+ label = "rfkill-m2-bt";
+@@ -95,9 +58,6 @@
+ vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+- gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pcie2_0_vcc3v3_en>;
+ regulator-name = "vcc3v3_pcie2x1l0";
+ regulator-always-on;
+ regulator-boot-on;
+@@ -105,6 +65,7 @@
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc5v0_sys>;
++ status = "disabled";
+ };
+
+ vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 {
+@@ -255,10 +216,8 @@
+ };
+
+ &hdmi_receiver {
+- hpd-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>;
+ pinctrl-names = "default";
+- status = "okay";
+ };
+
+ &hdptxphy0 {
+@@ -434,39 +393,17 @@
+ };
+
+ &pinctrl {
+- hdmirx {
+- hdmirx_hpd: hdmirx-5v-detection {
+- rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+- leds {
+- led_rgb_b: led-rgb-b {
+- rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+- sound {
+- hp_detect: hp-detect {
+- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+- };
+-
+ pcie2 {
+ pcie2_0_rst: pcie2-0-rst {
+ rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+- pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
+- rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+- };
+-
+ pcie2_2_rst: pcie2-2-rst {
+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+@@ -918,10 +855,6 @@
+ status = "okay";
+ };
+
+-&usb_host2_xhci {
+- status = "okay";
+-};
+-
+ &vop {
+ status = "okay";
+ };
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts
+@@ -2,7 +2,7 @@
+
+ /dts-v1/;
+
+-#include "rk3588-rock-5b-5bp-5t.dtsi"
++#include "rk3588-rock-5b.dtsi"
+
+ / {
+ model = "Radxa ROCK 5B+";
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+@@ -2,7 +2,7 @@
+
+ /dts-v1/;
+
+-#include "rk3588-rock-5b-5bp-5t.dtsi"
++#include "rk3588-rock-5b.dtsi"
+
+ / {
+ model = "Radxa ROCK 5B";
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
+@@ -0,0 +1,86 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++
++#include "rk3588-rock-5b-5bp-5t.dtsi"
++
++/ {
++ analog-sound {
++ compatible = "audio-graph-card";
++ label = "rk3588-es8316";
++
++ widgets = "Microphone", "Mic Jack",
++ "Headphone", "Headphones";
++
++ routing = "MIC2", "Mic Jack",
++ "Headphones", "HPOL",
++ "Headphones", "HPOR";
++
++ dais = <&i2s0_8ch_p0>;
++ hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&hp_detect>;
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&led_rgb_b>;
++
++ led_rgb_b {
++ function = LED_FUNCTION_STATUS;
++ color = <LED_COLOR_ID_BLUE>;
++ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
++ rfkill {
++ compatible = "rfkill-gpio";
++ label = "rfkill-m2-wlan";
++ radio-type = "wlan";
++ shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
++ };
++};
++
++&hdmi_receiver {
++ hpd-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
++ status = "okay";
++};
++
++&pinctrl {
++ hdmirx {
++ hdmirx_hpd: hdmirx-5v-detection {
++ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ leds {
++ led_rgb_b: led-rgb-b {
++ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pcie2 {
++ pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
++ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ sound {
++ hp_detect: hp-detect {
++ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++};
++
++&usb_host2_xhci {
++ status = "okay";
++};
++
++&vcc3v3_pcie2x1l0 {
++ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie2_0_vcc3v3_en>;
++ status = "okay";
++};
--- /dev/null
+From 0ea651de9b79a17cbe410a69399877805c136b76 Mon Sep 17 00:00:00 2001
+Date: Tue, 20 May 2025 20:50:11 +0200
+Subject: arm64: dts: rockchip: add ROCK 5T device tree
+
+The RADXA ROCK 5T is a single board computer quite similar to the ROCK
+5B+, except it has one more PCIe-to-Ethernet controller (at the expense
+of a USB3 port) and a barrel jack for power input instead. Some pins are
+shuffled around as well.
+
+Add a device tree for it.
+
+
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -143,6 +143,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ro
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtbo
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtbo
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-plus.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5t.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-toybrick-x0.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-turing-rk1.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
+@@ -0,0 +1,105 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++
++#include "rk3588-rock-5b-5bp-5t.dtsi"
++
++/ {
++ model = "Radxa ROCK 5T";
++ compatible = "radxa,rock-5t", "rockchip,rk3588";
++
++ analog-sound {
++ compatible = "audio-graph-card";
++ label = "rk3588-es8316";
++
++ widgets = "Microphone", "Mic Jack",
++ "Headphone", "Headphones";
++
++ routing = "MIC2", "Mic Jack",
++ "Headphones", "HPOL",
++ "Headphones", "HPOR";
++
++ dais = <&i2s0_8ch_p0>;
++ hp-det-gpios = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&hp_detect>;
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&led_rgb_b>;
++
++ led_rgb_b {
++ function = LED_FUNCTION_STATUS;
++ color = <LED_COLOR_ID_BLUE>;
++ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
++ rfkill {
++ compatible = "rfkill-gpio";
++ label = "rfkill-m2-wlan";
++ radio-type = "wlan";
++ shutdown-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
++ };
++
++ vcc3v3_pcie2x1l1: regulator-vcc3v3-pcie2x1l2 {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc3v3_pcie2x1l1";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ startup-delay-us = <5000>;
++ vin-supply = <&vcc_3v3_s3>;
++ };
++};
++
++&hdmi_receiver {
++ hpd-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
++ status = "okay";
++};
++
++&pcie2x1l1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie2_1_rst>;
++ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
++ vpcie3v3-supply = <&vcc3v3_pcie2x1l1>;
++ status = "okay";
++};
++
++&pinctrl {
++ hdmirx {
++ hdmirx_hpd: hdmirx-5v-detection {
++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ leds {
++ led_rgb_b: led-rgb-b {
++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ pcie2 {
++ pcie2_1_rst: pcie2-1-rst {
++ rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
++ rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ sound {
++ hp_detect: hp-detect {
++ rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++};
++
++&vcc3v3_pcie2x1l0 {
++ gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie2_0_vcc3v3_en>;
++ status = "okay";
++};
--- /dev/null
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+Date: Mon, 25 Aug 2025 09:27:08 +0200
+Subject: arm64: dts: rockchip: fix USB on RADXA ROCK 5T
+
+The RADXA ROCK 5T board uses the same GPIO pin for controlling the USB
+host port regulator. This control pin was mistakenly left out of the
+ROCK 5T device tree.
+
+Closes: https://libera.catirclogs.org/linux-rockchip/2025-08-25#38609886;
+Fixes: 0ea651de9b79 ("arm64: dts: rockchip: add ROCK 5T device tree")
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
+@@ -95,6 +95,12 @@
+ rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
++
++ usb {
++ vcc5v0_host_en: vcc5v0-host-en {
++ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
+ };
+
+ &vcc3v3_pcie2x1l0 {
+@@ -103,3 +109,10 @@
+ pinctrl-0 = <&pcie2_0_vcc3v3_en>;
+ status = "okay";
+ };
++
++&vcc5v0_host {
++ enable-active-high;
++ gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&vcc5v0_host_en>;
++};
--- /dev/null
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+Date: Tue, 26 Aug 2025 10:08:36 +0200
+Subject: arm64: dts: rockchip: fix second M.2 slot on ROCK 5T
+
+The Radxa ROCK 5T has two M.2 slots, much like the Radxa Rock 5B+. As it
+stands, the board won't be able to use PCIe3 if the second M.2 slot is
+in use.
+
+Fix this by adding the necessary node enablement and data-lanes property
+to the ROCK 5T device tree, mirroring what's in the ROCK 5B+ device
+tree.
+
+Closes: https://libera.catirclogs.org/linux-rockchip/2025-08-25#38610630;
+Fixes: 0ea651de9b79 ("arm64: dts: rockchip: add ROCK 5T device tree")
+
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
+@@ -68,6 +68,22 @@
+ status = "okay";
+ };
+
++&pcie30phy {
++ data-lanes = <1 1 2 2>;
++};
++
++&pcie3x2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pcie3x2_rst>;
++ reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
++ vpcie3v3-supply = <&vcc3v3_pcie30>;
++ status = "okay";
++};
++
++&pcie3x4 {
++ num-lanes = <2>;
++};
++
+ &pinctrl {
+ hdmirx {
+ hdmirx_hpd: hdmirx-5v-detection {
+@@ -90,6 +106,12 @@
+ };
+ };
+
++ pcie3 {
++ pcie3x2_rst: pcie3x2-rst {
++ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
+ sound {
+ hp_detect: hp-detect {
+ rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
Date: Mon Aug 05 16:14:33 2024 +0800
Subject: [PATCH] arm64: dts: rockchip: Update LED properties for Radxa
- Rock 5B
+ Rock 5B/5B+/5T
Add OpenWrt's LED aliases for showing system status.
---
---- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-@@ -14,6 +14,11 @@
- mmc0 = &sdhci;
- mmc1 = &sdmmc;
- mmc2 = &sdio;
-+
-+ led-boot = &status_led;
-+ led-failsafe = &status_led;
-+ led-running = &status_led;
-+ led-upgrade = &status_led;
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi
+@@ -27,11 +27,11 @@
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_rgb_b>;
+
+- led_rgb_b {
++ led_blue: led_rgb_b {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_BLUE>;
++ default-state = "on";
+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+- linux,default-trigger = "heartbeat";
+ };
};
- chosen {
-@@ -42,11 +47,10 @@
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
+@@ -30,11 +30,11 @@
pinctrl-names = "default";
pinctrl-0 = <&led_rgb_b>;
- led_rgb_b {
-+ status_led: led_rgb_b {
++ led_blue: led_rgb_b {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_BLUE>;
- gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
++ default-state = "on";
+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
};
};
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
+@@ -12,6 +12,10 @@
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ mmc2 = &sdio;
++ led-boot = &led_blue;
++ led-failsafe = &led_blue;
++ led-running = &led_blue;
++ led-upgrade = &led_blue;
+ };
+
+ chosen {
---
---- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-@@ -426,7 +426,7 @@
+--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
+@@ -452,7 +452,7 @@
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
projects / openwrt / staging / nbd.git / commitdiff