ARM: tegra: Remove disp1 clock initialization on Tegra210

pll_c is not a valid parent for the disp1 clock, so trying to set it
will fail. Given that display is not used in U-Boot, remove the init
table entry so that disp1 will keep its default parent (clk_m).

Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Tom Warren <[email protected]>

diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index 0d7cafea2017b4545b2e965905bf8e73878fad7a..b240860f08cf30e8c74dbdcf0f16dd701dc1978b 100644 (file)
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -1265,7 +1265,6 @@ struct periph_clk_init periph_clk_init_table[] = {
        { PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
        { PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
        { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
-       { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
        { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
        { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
        { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },