MIPS: Alchemy: Fix AU1100 interrupt numbers off-by-one

Signed-off-by: Ralf Baechle <[email protected]>

diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index 62f91f50b5b59d850346ea5fbc3365fb58ace9aa..87a16598ebc3970e1cb47e1e6313e8b188923d08 100644 (file)
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -715,7 +715,7 @@ enum soc_au1500_ints {
 #ifdef CONFIG_SOC_AU1100
 enum soc_au1100_ints {
        AU1100_FIRST_INT        = MIPS_CPU_IRQ_BASE + 8,
-       AU1100_UART0_INT,
+       AU1100_UART0_INT        = AU1100_FIRST_INT,
        AU1100_UART1_INT,
        AU1100_SD_INT,
        AU1100_UART3_INT,