targets += $(dtb-y)
--- /dev/null
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
-@@ -0,0 +1,20 @@
+@@ -0,0 +1,35 @@
+/*
+ * Broadcom BCM470X / BCM5301X arm platform code.
++ * DTS for Netgear R6250 V1
+ *
+ *
+#include "bcm4708.dtsi"
+
+/ {
-+ compatible = "netgear,r6250v1", "broadcom,bcm4708";
++ compatible = "netgear,r6250v1", "brcm,bcm4708";
+ model = "Netgear R6250 V1 (BCM4708)";
+
++ chosen {
++ bootargs = "console=ttyS0,115200";
++ };
++
+ memory {
+ reg = <0x00000000 0x08000000>;
+ };
++
++ chipcommonA {
++ uart0: serial@0300 {
++ status = "okay";
++ };
++
++ uart1: serial@0400 {
++ status = "okay";
++ };
++ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/bcm4708.dtsi
-@@ -0,0 +1,100 @@
+@@ -0,0 +1,34 @@
+/*
+ * Broadcom BCM470X / BCM5301X ARM platform code.
++ * DTS for BCM4708 SoC.
+ *
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+#include <dt-bindings/interrupt-controller/irq.h>
-+
-+#include "skeleton.dtsi"
++#include "bcm5301x.dtsi"
+
+/ {
-+ compatible = "broadcom,bcm4708";
-+ model = "Broadcom BCM4708";
-+ interrupt-parent = <&gic>;
-+
-+ chosen {
-+ bootargs = "console=ttyS0,115200 debug earlyprintk";
-+ };
++ compatible = "brcm,bcm4708";
+
+ cpus {
+ #address-cells = <1>;
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ next-level-cache = <&L2>;
-+ reg = <0>;
++ reg = <0x0>;
+ };
++
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ next-level-cache = <&L2>;
-+ reg = <1>;
++ reg = <0x1>;
+ };
+ };
+
-+ clocks {
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -0,0 +1,95 @@
++/*
++ * Broadcom BCM470X / BCM5301X ARM platform code.
++ * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
++ * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
++ *
++ *
++ * Licensed under the GNU/GPL. See COPYING for details.
++ */
++
++#include <dt-bindings/interrupt-controller/irq.h>
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++#include "skeleton.dtsi"
++
++/ {
++ interrupt-parent = <&gic>;
++
++ chipcommonA {
++ compatible = "simple-bus";
++ ranges = <0x00000000 0x18000000 0x00001000>;
+ #address-cells = <1>;
-+ #size-cells = <0>;
++ #size-cells = <1>;
++
++ uart0: serial@0300 {
++ compatible = "ns16550";
++ reg = <0x0300 0x100>;
++ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
++ clock-frequency = <100000000>;
++ status = "disabled";
++ };
+
-+ clk_periph: periph {
-+ compatible = "fixed-clock";
-+ #clock-cells = <0>;
-+ clock-frequency = <400000000>;
++ uart1: serial@0400 {
++ compatible = "ns16550";
++ reg = <0x0400 0x100>;
++ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
++ clock-frequency = <100000000>;
++ status = "disabled";
+ };
+ };
+
-+ uart@18000300 {
-+ compatible = "ns16550";
-+ reg = <0x18000300 0x100>;
-+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
-+ clock-frequency = <100000000>;
-+ };
++ mpcore {
++ compatible = "simple-bus";
++ ranges = <0x00000000 0x19020000 0x00003000>;
++ #address-cells = <1>;
++ #size-cells = <1>;
+
-+ uart@18000400 {
-+ compatible = "ns16550";
-+ reg = <0x18000400 0x100>;
-+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
-+ clock-frequency = <100000000>;
-+ };
++ scu@0000 {
++ compatible = "arm,cortex-a9-scu";
++ reg = <0x0000 0x100>;
++ };
+
-+ gic: interrupt-controller@19021000 {
-+ compatible = "arm,cortex-a9-gic";
-+ #interrupt-cells = <3>;
-+ #address-cells = <0>;
-+ interrupt-controller;
-+ reg = <0x19021000 0x1000>,
-+ <0x19020100 0x100>;
-+ };
++ timer@0200 {
++ compatible = "arm,cortex-a9-global-timer";
++ reg = <0x0200 0x100>;
++ interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clk_periph>;
++ };
+
-+ timer@19020200 {
-+ compatible = "arm,cortex-a9-global-timer";
-+ reg = <0x19020200 0x100>;
-+ interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clk_periph>;
-+ };
++ local-timer@0600 {
++ compatible = "arm,cortex-a9-twd-timer";
++ reg = <0x0600 0x100>;
++ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clk_periph>;
++ };
+
-+ local-timer@19020600 {
-+ compatible = "arm,cortex-a9-twd-timer";
-+ reg = <0x19020600 0x100>;
-+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clk_periph>;
-+ };
++ gic: interrupt-controller@1000 {
++ compatible = "arm,cortex-a9-gic";
++ #interrupt-cells = <3>;
++ #address-cells = <0>;
++ interrupt-controller;
++ reg = <0x1000 0x1000>,
++ <0x0100 0x100>;
++ };
+
-+ L2: cache-controller@19022000 {
-+ compatible = "arm,pl310-cache";
-+ reg = <0x19022000 0x1000>;
-+ cache-unified;
-+ cache-level = <2>;
++ L2: cache-controller@2000 {
++ compatible = "arm,pl310-cache";
++ reg = <0x2000 0x1000>;
++ cache-unified;
++ cache-level = <2>;
++ };
+ };
+
-+ scu@19020000 {
-+ compatible = "arm,cortex-a9-scu";
-+ reg = <0x19020000 0x100>;
++ clocks {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ /* As long as we do not have a real clock driver us this
++ * fixed clock */
++ clk_periph: periph {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <400000000>;
++ };
+ };
+};
--- /dev/null
+#include <asm/hardware/debug-8250.S>
--- /dev/null
+++ b/arch/arm/mach-bcm53xx/Kconfig
-@@ -0,0 +1,26 @@
+@@ -0,0 +1,25 @@
+config ARCH_BCM_5301X
+ bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
+ depends on MMU
+ select HAVE_SMP
+ select COMMON_CLK
+ select GENERIC_CLOCKEVENTS
-+ select GENERIC_TIME
+ select ARM_GLOBAL_TIMER
+ select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
+ select MIGHT_HAVE_PCI
+obj-y += bcm53xx.o
--- /dev/null
+++ b/arch/arm/mach-bcm53xx/bcm53xx.c
-@@ -0,0 +1,60 @@
+@@ -0,0 +1,70 @@
+/*
+ * Broadcom BCM470X / BCM5301X ARM platform code.
+ *
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
-+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <asm/hardware/cache-l2x0.h>
+
+#include <asm/mach/arch.h>
-+#include <asm/mach/map.h>
++#include <asm/siginfo.h>
+#include <asm/signal.h>
+
++
++static bool first_fault = true;
++
+static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr,
+ struct pt_regs *regs)
+{
-+ /*
-+ * These happen for no good reason, possibly left over from CFE
-+ */
-+ pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
++ if (fsr == 0x1c06 && first_fault) {
++ first_fault = false;
++
++ /*
++ * These faults with code 0x1c06 happens for no good reason,
++ * possibly left over from the CFE boot loader.
++ */
++ pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
+ addr, fsr);
+
-+ /* Returning non-zero causes fault display and panic */
-+ return 0;
++ /* Returning non-zero causes fault display and panic */
++ return 0;
++ }
++
++ /* Others should cause a fault */
++ return 1;
+}
+
+static void __init bcm5301x_init_early(void)
+{
+ /* Install our hook */
-+ hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, 0,
++ hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, BUS_OBJERR,
+ "imprecise external abort");
+}
+
+}
+
+static const char __initconst *bcm5301x_dt_compat[] = {
-+ "broadcom,bcm4708",
++ "brcm,bcm4708",
+ NULL,
+};
+
-bcm53xx: register bcma bus
+From 22b90bcf616578abe09845c72317ce53312f7faf Mon Sep 17 00:00:00 2001
+Date: Sat, 25 Jan 2014 17:03:07 +0100
+Subject: [PATCH 8/8] ARM: BCM5301X: register bcma bus
---
- arch/arm/boot/dts/bcm4708.dtsi | 5 +++++
- 1 file changed, 5 insertions(+)
+ arch/arm/boot/dts/bcm4708.dtsi | 43 ++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 43 insertions(+)
--- a/arch/arm/boot/dts/bcm4708.dtsi
+++ b/arch/arm/boot/dts/bcm4708.dtsi
-@@ -72,6 +72,11 @@
- <0x19020100 0x100>;
+@@ -31,4 +31,47 @@
+ };
};
-+ bus@18000000 {
++ aix@18000000 {
+ compatible = "brcm,bus-aix";
+ reg = <0x18000000 0x1000>;
-+ };
++ ranges = <0x00000000 0x18000000 0x00100000>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ usb2@0 {
++ compatible = "brcm,northstar-usb2";
++ reg = <0x18021000 0x1000>;
++ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ usb3@0 {
++ compatible = "brcm,northstar-usb3";
++ reg = <0x18023000 0x1000>;
++ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ gmac@0 {
++ compatible = "brcm,northstar-gmac";
++ reg = <0x18024000 0x1000>;
++ interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
++ };
+
- timer@19020200 {
- compatible = "arm,cortex-a9-global-timer";
- reg = <0x19020200 0x100>;
++ gmac@1 {
++ compatible = "brcm,northstar-gmac";
++ reg = <0x18025000 0x1000>;
++ interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ gmac@2 {
++ compatible = "brcm,northstar-gmac";
++ reg = <0x18026000 0x1000>;
++ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ gmac@3 {
++ compatible = "brcm,northstar-gmac";
++ reg = <0x18027000 0x1000>;
++ interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
++ };
++ };
+ };
-bcma: register bcma as device tree driver
+From c046c19fc8f1af7cf253fea5b0253143c159948a Mon Sep 17 00:00:00 2001
+Date: Mon, 6 Jan 2014 23:29:15 +0100
+Subject: [PATCH 6/8] bcma: register bcma as device tree driver
This driver is used by the bcm53xx ARM SoC code.Now it is possible to
give the address of the chipcommon core in device tree.
---
- drivers/bcma/host_soc.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 73 insertions(+)
+ drivers/bcma/host_soc.c | 70 +++++++++++++++++++++++++++++++++++++++++++++
+ include/linux/bcma/bcma.h | 2 ++
+ 2 files changed, 72 insertions(+)
--- a/drivers/bcma/host_soc.c
+++ b/drivers/bcma/host_soc.c
#include <linux/bcma/bcma.h>
#include <linux/bcma/bcma_soc.h>
-@@ -181,3 +184,73 @@ int __init bcma_host_soc_register(struct
+@@ -173,6 +176,7 @@ int __init bcma_host_soc_register(struct
+ /* Host specific */
+ bus->hosttype = BCMA_HOSTTYPE_SOC;
+ bus->ops = &bcma_host_soc_ops;
++ bus->host_pdev = NULL;
+
+ /* Register */
+ err = bcma_bus_early_register(bus, &soc->core_cc, &soc->core_mips);
+@@ -181,3 +185,69 @@ int __init bcma_host_soc_register(struct
return err;
}
+ int err;
+
+ /* Alloc */
-+ bus = kzalloc(sizeof(*bus), GFP_KERNEL);
++ bus = devm_kzalloc(dev, sizeof(*bus), GFP_KERNEL);
+ if (!bus)
+ return -ENOMEM;
+
+ /* Map MMIO */
-+ err = -ENOMEM;
+ bus->mmio = of_iomap(np, 0);
+ if (!bus->mmio)
-+ goto err_kfree_bus;
++ return -ENOMEM;
+
+ /* Host specific */
+ bus->hosttype = BCMA_HOSTTYPE_SOC;
+ bus->ops = &bcma_host_soc_ops;
-+
++ bus->host_pdev = pdev;
+
+ /* Register */
+ err = bcma_bus_register(bus);
+
+err_unmap_mmio:
+ iounmap(bus->mmio);
-+err_kfree_bus:
-+ kfree(bus);
+ return err;
+}
+
+
+ bcma_bus_unregister(bus);
+ iounmap(bus->mmio);
-+ kfree(bus);
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+};
+module_platform_driver(bcma_host_soc_driver);
+#endif /* CONFIG_OF */
+--- a/include/linux/bcma/bcma.h
++++ b/include/linux/bcma/bcma.h
+@@ -319,6 +319,8 @@ struct bcma_bus {
+ struct pci_dev *host_pci;
+ /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
+ struct sdio_func *host_sdio;
++ /* Pointer to platform device (only for BCMA_HOSTTYPE_SOC) */
++ struct platform_device *host_pdev;
+ };
+
+ struct bcma_chipinfo chipinfo;
--- /dev/null
+From 06a21484198df9a4d34fe5062878d3bf4fc14340 Mon Sep 17 00:00:00 2001
+Date: Thu, 9 Jan 2014 19:40:14 +0100
+Subject: [PATCH 7/8] bcma: get irqs from dt
+
+---
+ drivers/bcma/main.c | 42 +++++++++++++++++++++++++++++++++++++++++-
+ 1 file changed, 41 insertions(+), 1 deletion(-)
+
+--- a/drivers/bcma/main.c
++++ b/drivers/bcma/main.c
+@@ -10,6 +10,8 @@
+ #include <linux/platform_device.h>
+ #include <linux/bcma/bcma.h>
+ #include <linux/slab.h>
++#include <linux/of_irq.h>
++#include <linux/of_address.h>
+
+ MODULE_DESCRIPTION("Broadcom's specific AMBA driver");
+ MODULE_LICENSE("GPL");
+@@ -111,6 +113,38 @@ static void bcma_release_core_dev(struct
+ kfree(core);
+ }
+
++static struct device_node *bcma_of_find_child_device(struct platform_device *parent,
++ struct bcma_device *core)
++{
++ struct device_node *node;
++ u64 size;
++ const __be32 *reg;
++
++ if (!parent || !parent->dev.of_node)
++ return NULL;
++
++ for_each_child_of_node(parent->dev.of_node, node) {
++ reg = of_get_address(node, 0, &size, 0);
++ if (!reg)
++ continue;
++ if (be32_to_cpup(reg) == core->addr)
++ return node;
++ }
++ return NULL;
++}
++
++static void bcma_of_fill_device(struct platform_device *parent,
++ struct bcma_device *core)
++{
++ struct device_node *node;
++
++ node = bcma_of_find_child_device(parent, core);
++ if (!node)
++ return;
++ core->dev.of_node = node;
++ core->irq = irq_of_parse_and_map(node, 0);
++}
++
+ static int bcma_register_cores(struct bcma_bus *bus)
+ {
+ struct bcma_device *core;
+@@ -145,7 +179,13 @@ static int bcma_register_cores(struct bc
+ break;
+ case BCMA_HOSTTYPE_SOC:
+ core->dev.dma_mask = &core->dev.coherent_dma_mask;
+- core->dma_dev = &core->dev;
++ if (bus->host_pdev) {
++ core->dma_dev = &bus->host_pdev->dev;
++ core->dev.parent = &bus->host_pdev->dev;
++ bcma_of_fill_device(bus->host_pdev, core);
++ } else {
++ core->dma_dev = &core->dev;
++ }
+ break;
+ case BCMA_HOSTTYPE_SDIO:
+ break;
+++ /dev/null
-bcma: fix dma mask
-
-
----
- drivers/bcma/main.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/bcma/main.c
-+++ b/drivers/bcma/main.c
-@@ -144,6 +144,7 @@ static int bcma_register_cores(struct bc
- core->irq = bus->host_pci->irq;
- break;
- case BCMA_HOSTTYPE_SOC:
-+ core->dev.coherent_dma_mask = DMA_BIT_MASK(32);
- core->dev.dma_mask = &core->dev.coherent_dma_mask;
- core->dma_dev = &core->dev;
- break;
+++ /dev/null
-bcma: add arm support
-
-
----
- drivers/bcma/Kconfig | 9 +++++
- drivers/bcma/Makefile | 1 +
- drivers/bcma/driver_arm.c | 61 ++++++++++++++++++++++++++++++++++
- drivers/bcma/main.c | 7 ++++
- include/linux/bcma/bcma.h | 2 ++
- include/linux/bcma/bcma_driver_arm.h | 20 +++++++++++
- 6 files changed, 100 insertions(+)
- create mode 100644 drivers/bcma/driver_arm.c
- create mode 100644 include/linux/bcma/bcma_driver_arm.h
-
---- a/drivers/bcma/Kconfig
-+++ b/drivers/bcma/Kconfig
-@@ -54,6 +54,15 @@ config BCMA_DRIVER_MIPS
-
- If unsure, say N
-
-+config BCMA_DRIVER_ARM
-+ bool "BCMA Broadcom ARM core driver"
-+ depends on BCMA && ARM
-+ help
-+ Driver for the Broadcom MIPS core attached to Broadcom specific
-+ Advanced Microcontroller Bus.
-+
-+ If unsure, say N
-+
- config BCMA_SFLASH
- bool
- depends on BCMA_DRIVER_MIPS
---- a/drivers/bcma/Makefile
-+++ b/drivers/bcma/Makefile
-@@ -5,6 +5,7 @@ bcma-$(CONFIG_BCMA_NFLASH) += driver_ch
- bcma-y += driver_pci.o
- bcma-$(CONFIG_BCMA_DRIVER_PCI_HOSTMODE) += driver_pci_host.o
- bcma-$(CONFIG_BCMA_DRIVER_MIPS) += driver_mips.o
-+bcma-$(CONFIG_BCMA_DRIVER_ARM) += driver_arm.o
- bcma-$(CONFIG_BCMA_DRIVER_GMAC_CMN) += driver_gmac_cmn.o
- bcma-$(CONFIG_BCMA_DRIVER_GPIO) += driver_gpio.o
- bcma-$(CONFIG_BCMA_HOST_PCI) += host_pci.o
---- /dev/null
-+++ b/drivers/bcma/driver_arm.c
-@@ -0,0 +1,53 @@
-+/*
-+ * Broadcom specific AMBA
-+ * Broadcom MIPS32 74K core driver
-+ *
-+ * Copyright 2009, Broadcom Corporation
-+ *
-+ * Licensed under the GNU/GPL. See COPYING for details.
-+ */
-+
-+#include "bcma_private.h"
-+
-+#include <linux/bcma/bcma.h>
-+
-+static void bcma_core_mips_set_irq_name(struct bcma_bus *bus, unsigned int irq,
-+ u16 coreid, u8 unit)
-+{
-+ struct bcma_device *core;
-+
-+ core = bcma_find_core_unit(bus, coreid, unit);
-+ if (!core) {
-+ bcma_warn(bus,
-+ "Can not find core (id: 0x%x, unit %i) for IRQ configuration.\n",
-+ coreid, unit);
-+ return;
-+ }
-+ core->irq = irq;
-+}
-+
-+void bcma_core_arm_init(struct bcma_drv_arm *acore)
-+{
-+ struct bcma_bus *bus;
-+ struct bcma_device *core;
-+ bus = acore->core->bus;
-+
-+ if (acore->setup_done)
-+ return;
-+
-+ bcma_core_mips_set_irq_name(bus, 111, BCMA_CORE_USB20, 0);
-+
-+ bcma_core_mips_set_irq_name(bus, 179, BCMA_CORE_MAC_GBIT, 0);
-+ bcma_core_mips_set_irq_name(bus, 180, BCMA_CORE_MAC_GBIT, 1);
-+ bcma_core_mips_set_irq_name(bus, 181, BCMA_CORE_MAC_GBIT, 2);
-+ bcma_core_mips_set_irq_name(bus, 182, BCMA_CORE_MAC_GBIT, 3);
-+
-+ bcma_core_mips_set_irq_name(bus, 112, BCMA_CORE_USB30, 0);
-+ bcma_debug(bus, "IRQ reconfiguration done\n");
-+
-+
-+ acore->setup_done = true;
-+}
---- a/drivers/bcma/main.c
-+++ b/drivers/bcma/main.c
-@@ -259,6 +259,13 @@ int bcma_bus_register(struct bcma_bus *b
- bcma_core_mips_init(&bus->drv_mips);
- }
-
-+ /* Init ARM core */
-+ core = bcma_find_core(bus, BCMA_CORE_ARMCA9);
-+ if (core) {
-+ bus->drv_arm.core = core;
-+ bcma_core_arm_init(&bus->drv_arm);
-+ }
-+
- /* Init PCIE core */
- core = bcma_find_core_unit(bus, BCMA_CORE_PCIE, 0);
- if (core) {
---- a/include/linux/bcma/bcma.h
-+++ b/include/linux/bcma/bcma.h
-@@ -7,6 +7,7 @@
- #include <linux/bcma/bcma_driver_chipcommon.h>
- #include <linux/bcma/bcma_driver_pci.h>
- #include <linux/bcma/bcma_driver_mips.h>
-+#include <linux/bcma/bcma_driver_arm.h>
- #include <linux/bcma/bcma_driver_gmac_cmn.h>
- #include <linux/ssb/ssb.h> /* SPROM sharing */
-
-@@ -334,6 +335,7 @@ struct bcma_bus {
- struct bcma_drv_cc drv_cc;
- struct bcma_drv_pci drv_pci[2];
- struct bcma_drv_mips drv_mips;
-+ struct bcma_drv_arm drv_arm;
- struct bcma_drv_gmac_cmn drv_gmac_cmn;
-
- /* We decided to share SPROM struct with SSB as long as we do not need
---- /dev/null
-+++ b/include/linux/bcma/bcma_driver_arm.h
-@@ -0,0 +1,20 @@
-+#ifndef LINUX_BCMA_DRIVER_ARM_H_
-+#define LINUX_BCMA_DRIVER_ARM_H_
-+
-+struct bcma_device;
-+
-+struct bcma_drv_arm {
-+ struct bcma_device *core;
-+ u8 setup_done:1;
-+ u8 early_setup_done:1;
-+};
-+
-+#ifdef CONFIG_BCMA_DRIVER_ARM
-+extern void bcma_core_arm_init(struct bcma_drv_arm *acore);
-+
-+#else
-+static inline void bcma_core_arm_init(struct bcma_drv_arm *acore) { }
-+
-+#endif
-+
-+#endif /* LINUX_BCMA_DRIVER_ARM_H_ */
projects / openwrt / openwrt.git / commitdiff