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perf/x86: Enable/Add IvyBridge hardware support
author
Peter Zijlstra
<
[email protected]
>
Tue, 5 Jun 2012 08:26:43 +0000
(10:26 +0200)
committer
Ingo Molnar
<
[email protected]
>
Wed, 6 Jun 2012 14:59:49 +0000
(16:59 +0200)
Implement rudimentary IVB perf support. The SDM states its identical
to SNB with exception of the exact event tables, but a quick look
suggests they're similar enough.
Also mark SNB-EP as broken for now.
Requested-and-tested-by: Linus Torvalds <
[email protected]
>
Cc: Stephane Eranian <
[email protected]
>
Signed-off-by: Peter Zijlstra <
[email protected]
>
Link:
http://lkml.kernel.org/r/1338884803.28282.153.camel@twins
Signed-off-by: Ingo Molnar <
[email protected]
>
arch/x86/kernel/cpu/perf_event_intel.c
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diff --git
a/arch/x86/kernel/cpu/perf_event_intel.c
b/arch/x86/kernel/cpu/perf_event_intel.c
index 2312c1ff1b19d7fa120f24eae163bcdf4fd42610..187c294bc6583424e8613df62a883740ab8fca1a 100644
(file)
--- a/
arch/x86/kernel/cpu/perf_event_intel.c
+++ b/
arch/x86/kernel/cpu/perf_event_intel.c
@@
-1909,8
+1909,9
@@
__init int intel_pmu_init(void)
break;
case 42: /* SandyBridge */
- x86_add_quirk(intel_sandybridge_quirk);
case 45: /* SandyBridge, "Romely-EP" */
+ x86_add_quirk(intel_sandybridge_quirk);
+ case 58: /* IvyBridge */
memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
sizeof(hw_cache_event_ids));