--- /dev/null
+From 02b18f9cf43dcc9bea066a2390b8c8a59313aad0 Mon Sep 17 00:00:00 2001
+Date: Sun, 19 Oct 2025 20:58:36 +0000
+Subject: [PATCH] arm64: dts: rockchip: Add Radxa ROCK 2A/2F
+
+The ROCK 2A and ROCK 2F is a high-performance single board computer
+developed by Radxa, based on the Rockchip RK3528A SoC.
+
+Add initial device tree for the Radxa ROCK 2A and ROCK 2F boards.
+
+
+[ upstream commit: 5b71b3d9aa61626d6a93ed2f761a748aa2ecfa95 ]
+
+(cherry picked from commit d272bc0c747a5af49cf98140ebd25a702f84ab52)
+---
+ .../src/arm64/rockchip/rk3528-rock-2.dtsi | 293 ++++++++++++++++++
+ .../src/arm64/rockchip/rk3528-rock-2a.dts | 82 +++++
+ .../src/arm64/rockchip/rk3528-rock-2f.dts | 10 +
+ 3 files changed, 385 insertions(+)
+ create mode 100644 dts/upstream/src/arm64/rockchip/rk3528-rock-2.dtsi
+ create mode 100644 dts/upstream/src/arm64/rockchip/rk3528-rock-2a.dts
+ create mode 100644 dts/upstream/src/arm64/rockchip/rk3528-rock-2f.dts
+
+--- /dev/null
++++ b/dts/upstream/src/arm64/rockchip/rk3528-rock-2.dtsi
+@@ -0,0 +1,288 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/leds/common.h>
++#include <dt-bindings/pwm/pwm.h>
++#include "rk3528.dtsi"
++
++/ {
++ aliases {
++ i2c1 = &i2c1;
++ mmc0 = &sdhci;
++ mmc1 = &sdmmc;
++ serial0 = &uart0;
++ };
++
++ chosen {
++ stdout-path = "serial0:1500000n8";
++ };
++
++ adc-keys {
++ compatible = "adc-keys";
++ io-channels = <&saradc 0>;
++ io-channel-names = "buttons";
++ keyup-threshold-microvolt = <1800000>;
++ poll-interval = <100>;
++
++ button-maskrom {
++ label = "MASKROM";
++ linux,code = <KEY_SETUP>;
++ press-threshold-microvolt = <0>;
++ };
++ };
++
++ leds: leds {
++ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&state_led_b>;
++
++ led-0 {
++ color = <LED_COLOR_ID_BLUE>;
++ default-state = "on";
++ function = LED_FUNCTION_HEARTBEAT;
++ gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
++ vdd_0v9: regulator-0v9-vdd {
++ compatible = "regulator-fixed";
++ regulator-name = "vdd_0v9";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <900000>;
++ regulator-max-microvolt = <900000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc_ddr: regulator-1v1-vcc-ddr {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc_ddr";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1100000>;
++ regulator-max-microvolt = <1100000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc_1v8: regulator-1v8-vcc {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc_1v8";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ vin-supply = <&vcc_3v3>;
++ };
++
++ vcc_3v3: regulator-3v3-vcc {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc_3v3";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vcc_wifi: regulator-3v3-vcc-wifi {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&usb_wifi_pwr>;
++ regulator-name = "vcc_wifi";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ vin-supply = <&vcc_3v3>;
++ };
++
++ vcc5v0_sys: regulator-5v0-vcc-sys {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc5v0_sys";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ };
++
++ vcc5v0_usb20: regulator-5v0-vcc-usb20 {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&usb_host_en>;
++ regulator-name = "vcc5v0_usb20";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vccio_sd: regulator-vccio-sd {
++ compatible = "regulator-gpio";
++ gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdmmc_vol_ctrl_h>;
++ regulator-name = "vccio_sd";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ states = <1800000 0x0>, <3300000 0x1>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++
++ vdd_arm: regulator-vdd-arm {
++ compatible = "pwm-regulator";
++ pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
++ pwm-supply = <&vcc5v0_sys>;
++ regulator-name = "vdd_arm";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <746000>;
++ regulator-max-microvolt = <1201000>;
++ regulator-settling-time-up-us = <250>;
++ };
++
++ vdd_logic: regulator-vdd-logic {
++ compatible = "pwm-regulator";
++ pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
++ pwm-supply = <&vcc5v0_sys>;
++ regulator-name = "vdd_logic";
++ regulator-always-on;
++ regulator-boot-on;
++ regulator-min-microvolt = <705000>;
++ regulator-max-microvolt = <1006000>;
++ regulator-settling-time-up-us = <250>;
++ };
++
++ rfkill {
++ compatible = "rfkill-gpio";
++ label = "rfkill-wlan";
++ pinctrl-names = "default";
++ pinctrl-0 = <&wifi_reg_on_h>;
++ radio-type = "wlan";
++ shutdown-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
++ };
++};
++
++&cpu0 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&cpu1 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&cpu2 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&cpu3 {
++ cpu-supply = <&vdd_arm>;
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c1m0_xfer>;
++ status = "okay";
++
++ eeprom@50 {
++ compatible = "belling,bl24c16a", "atmel,24c16";
++ reg = <0x50>;
++ pagesize = <16>;
++ read-only;
++ vcc-supply = <&vcc_3v3>;
++ };
++};
++
++&pinctrl {
++ bluetooth {
++ bt_wake_host_h: bt-wake-host-h {
++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
++ };
++
++ host_wake_bt_h: host-wake-bt-h {
++ rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ leds {
++ state_led_b: state-led-b {
++ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ sdmmc {
++ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ usb {
++ usb_host_en: usb-host-en {
++ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ wifi {
++ usb_wifi_pwr: usb-wifi-pwr {
++ rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ wifi_reg_on_h: wifi-reg-on-h {
++ rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++
++ wifi_wake_host_h: wifi-wake-host-h {
++ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
++ };
++ };
++};
++
++&pwm1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pwm1m0_pins>;
++ status = "okay";
++};
++
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pwm2m0_pins>;
++ status = "okay";
++};
++
++&saradc {
++ vref-supply = <&vcc_1v8>;
++ status = "okay";
++};
++
++&sdhci {
++ bus-width = <8>;
++ cap-mmc-highspeed;
++ mmc-hs200-1_8v;
++ no-sd;
++ no-sdio;
++ non-removable;
++ vmmc-supply = <&vcc_3v3>;
++ vqmmc-supply = <&vcc_1v8>;
++ status = "okay";
++};
++
++&sdmmc {
++ bus-width = <4>;
++ cap-mmc-highspeed;
++ cap-sd-highspeed;
++ disable-wp;
++ max-frequency = <100000000>;
++ sd-uhs-sdr104;
++ vmmc-supply = <&vcc_3v3>;
++ vqmmc-supply = <&vccio_sd>;
++ status = "okay";
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0m0_xfer>;
++ status = "okay";
++};
+--- /dev/null
++++ b/dts/upstream/src/arm64/rockchip/rk3528-rock-2a.dts
+@@ -0,0 +1,82 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++
++#include "rk3528-rock-2.dtsi"
++
++/ {
++ model = "Radxa ROCK 2A";
++ compatible = "radxa,rock-2a", "rockchip,rk3528";
++
++ aliases {
++ ethernet0 = &gmac1;
++ };
++
++ vcc5v0_usb30_otg: regulator-5v0-vcc-usb30-otg {
++ compatible = "regulator-fixed";
++ enable-active-high;
++ gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&usb_otg_en>;
++ regulator-name = "vcc5v0_usb30_otg";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ vin-supply = <&vcc5v0_sys>;
++ };
++};
++
++&gmac1 {
++ clock_in_out = "output";
++ phy-handle = <&rgmii_phy>;
++ phy-mode = "rgmii-id";
++ phy-supply = <&vcc_3v3>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
++ <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
++ status = "okay";
++};
++
++&leds {
++ pinctrl-names = "default";
++ pinctrl-0 = <&state_led_b>, <&sys_led_g>;
++
++ led-1 {
++ color = <LED_COLOR_ID_GREEN>;
++ default-state = "on";
++ function = LED_FUNCTION_STATUS;
++ gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
++ linux,default-trigger = "default-on";
++ };
++};
++
++&mdio1 {
++ rgmii_phy: ethernet-phy@1 {
++ compatible = "ethernet-phy-ieee802.3-c22";
++ reg = <0x1>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&gmac1_rstn_l>;
++ reset-assert-us = <20000>;
++ reset-deassert-us = <100000>;
++ reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
++ };
++};
++
++&pinctrl {
++ ethernet {
++ gmac1_rstn_l: gmac1-rstn-l {
++ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ leds {
++ sys_led_g: sys-led-g {
++ rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++
++ usb {
++ usb_otg_en: usb-otg-en {
++ rockchip,pins = <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
++ };
++ };
++};
+--- /dev/null
++++ b/dts/upstream/src/arm64/rockchip/rk3528-rock-2f.dts
+@@ -0,0 +1,10 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++/dts-v1/;
++
++#include "rk3528-rock-2.dtsi"
++
++/ {
++ model = "Radxa ROCK 2F";
++ compatible = "radxa,rock-2f", "rockchip,rk3528";
++};
--- /dev/null
+From 15b368fb5fde5663dd29176ee548053770dd74d4 Mon Sep 17 00:00:00 2001
+Date: Sun, 19 Oct 2025 20:58:37 +0000
+Subject: [PATCH] board: rockchip: Add Radxa ROCK 2A/2F
+
+The ROCK 2 Family is a high-performance SBC (Single Board Computer)
+developed by Radxa, based on the Rockchip RK3528A.
+
+The Radxa E20C shares some board characteristics with the ROCK 2 family
+boards.
+
+Add support for the ROCK 2A and 2F boards. The radxa-e20c-rk3528 target
+is also extended to support booting ROCK 2 boards.
+
+Features tested on a ROCK 2A v1.202:
+- SD-card boot
+- Ethernet
+- USB host (with pending DT changes)
+
+Features tested on a ROCK 2F v1.016:
+- SD-card boot
+- eMMC boot
+- USB host (with pending DT changes)
+
+---
+ arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi | 5 ++
+ arch/arm/dts/rk3528-rock-2-u-boot.dtsi | 16 +++++
+ arch/arm/dts/rk3528-rock-2a-u-boot.dtsi | 3 +
+ arch/arm/dts/rk3528-rock-2f-u-boot.dtsi | 3 +
+ arch/arm/mach-rockchip/rk3528/Kconfig | 7 +++
+ board/radxa/rock-2-rk3528/Kconfig | 14 +++++
+ board/radxa/rock-2-rk3528/MAINTAINERS | 6 ++
+ board/radxa/rock-2-rk3528/Makefile | 3 +
+ board/radxa/rock-2-rk3528/rock-2-rk3528.c | 60 +++++++++++++++++++
+ configs/radxa-e20c-rk3528_defconfig | 3 +
+ configs/rock-2-rk3528_defconfig | 68 ++++++++++++++++++++++
+ doc/board/rockchip/rockchip.rst | 1 +
+ 12 files changed, 189 insertions(+)
+ create mode 100644 arch/arm/dts/rk3528-rock-2-u-boot.dtsi
+ create mode 100644 arch/arm/dts/rk3528-rock-2a-u-boot.dtsi
+ create mode 100644 arch/arm/dts/rk3528-rock-2f-u-boot.dtsi
+ create mode 100644 board/radxa/rock-2-rk3528/Kconfig
+ create mode 100644 board/radxa/rock-2-rk3528/MAINTAINERS
+ create mode 100644 board/radxa/rock-2-rk3528/Makefile
+ create mode 100644 board/radxa/rock-2-rk3528/rock-2-rk3528.c
+ create mode 100644 configs/rock-2-rk3528_defconfig
+
+--- a/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi
++++ b/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi
+@@ -6,6 +6,11 @@
+ mmc-hs200-1_8v;
+ };
+
++&saradc {
++ bootph-pre-ram;
++ vdd-microvolts = <1800000>;
++};
++
+ &vdd_arm {
+ regulator-init-microvolt = <953000>;
+ };
+--- /dev/null
++++ b/arch/arm/dts/rk3528-rock-2-u-boot.dtsi
+@@ -0,0 +1,16 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk3528-u-boot.dtsi"
++
++&saradc {
++ bootph-pre-ram;
++ vdd-microvolts = <1800000>;
++};
++
++&vdd_arm {
++ regulator-init-microvolt = <953000>;
++};
++
++&vdd_logic {
++ regulator-init-microvolt = <900000>;
++};
+--- /dev/null
++++ b/arch/arm/dts/rk3528-rock-2a-u-boot.dtsi
+@@ -0,0 +1,3 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk3528-rock-2-u-boot.dtsi"
+--- /dev/null
++++ b/arch/arm/dts/rk3528-rock-2f-u-boot.dtsi
+@@ -0,0 +1,3 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++#include "rk3528-rock-2-u-boot.dtsi"
+--- a/arch/arm/mach-rockchip/rk3528/Kconfig
++++ b/arch/arm/mach-rockchip/rk3528/Kconfig
+@@ -1,5 +1,10 @@
+ if ROCKCHIP_RK3528
+
++config TARGET_RADXA_ROCK_2_RK3528
++ bool "Radxa ROCK 2A/2F"
++ help
++ Radxa ROCK 2A/2F single board computers with a RK3528A SoC.
++
+ config ROCKCHIP_BOOT_MODE_REG
+ default 0xff370200
+
+@@ -9,6 +14,8 @@ config ROCKCHIP_STIMER_BASE
+ config SYS_SOC
+ default "rk3528"
+
++source "board/radxa/rock-2-rk3528/Kconfig"
++
+ config SYS_CONFIG_NAME
+ default "rk3528_common"
+
+--- /dev/null
++++ b/board/radxa/rock-2-rk3528/Kconfig
+@@ -0,0 +1,14 @@
++if TARGET_RADXA_ROCK_2_RK3528
++
++config SYS_BOARD
++ default "rock-2-rk3528"
++
++config SYS_VENDOR
++ default "radxa"
++
++config BOARD_SPECIFIC_OPTIONS # dummy
++ def_bool y
++ select ADC
++ select SPL_ADC
++
++endif
+--- /dev/null
++++ b/board/radxa/rock-2-rk3528/MAINTAINERS
+@@ -0,0 +1,6 @@
++RADXA-ROCK-2-RK3528
++S: Maintained
++F: board/radxa/rock-2-rk3528
++F: configs/rock-2-rk3528_defconfig
++F: arch/arm/dts/rk3528-rock-2*
+--- /dev/null
++++ b/board/radxa/rock-2-rk3528/Makefile
+@@ -0,0 +1,3 @@
++# SPDX-License-Identifier: GPL-2.0+
++
++obj-y += rock-2-rk3528.o
+--- /dev/null
++++ b/board/radxa/rock-2-rk3528/rock-2-rk3528.c
+@@ -0,0 +1,60 @@
++// SPDX-License-Identifier: GPL-2.0+
++
++#include <linux/errno.h>
++#include <linux/kernel.h>
++#include <adc.h>
++#include <env.h>
++
++#define HW_ID_CHANNEL 2
++
++struct board_model {
++ unsigned int low;
++ unsigned int high;
++ const char *fdtfile;
++};
++
++static const struct board_model board_models[] = {
++ { 63, 278, "rockchip/rk3528-rock-2a.dtb" },
++ { 291, 392, "rockchip/rk3528-radxa-e20c.dtb" },
++ { 519, 733, "rockchip/rk3528-rock-2f.dtb" },
++};
++
++static const struct board_model *get_board_model(void)
++{
++ unsigned int val;
++ int i, ret;
++
++ ret = adc_channel_single_shot("adc@ffae0000", HW_ID_CHANNEL, &val);
++ if (ret)
++ return NULL;
++
++ for (i = 0; i < ARRAY_SIZE(board_models); i++) {
++ unsigned int min = board_models[i].low;
++ unsigned int max = board_models[i].high;
++
++ if (min <= val && val <= max)
++ return &board_models[i];
++ }
++
++ return NULL;
++}
++
++int rk_board_late_init(void)
++{
++ const struct board_model *model = get_board_model();
++
++ if (model)
++ env_set("fdtfile", model->fdtfile);
++
++ return 0;
++}
++
++int board_fit_config_name_match(const char *name)
++{
++ const struct board_model *model = get_board_model();
++
++ if (model && !strcmp(name, model->fdtfile))
++ return 0;
++
++ return -EINVAL;
++}
+--- a/configs/radxa-e20c-rk3528_defconfig
++++ b/configs/radxa-e20c-rk3528_defconfig
+@@ -4,12 +4,14 @@ CONFIG_COUNTER_FREQUENCY=24000000
+ CONFIG_ARCH_ROCKCHIP=y
+ CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3528-radxa-e20c"
+ CONFIG_ROCKCHIP_RK3528=y
++CONFIG_TARGET_RADXA_ROCK_2_RK3528=y
+ CONFIG_SYS_LOAD_ADDR=0xc00800
+ CONFIG_DEBUG_UART_BASE=0xFF9F0000
+ CONFIG_DEBUG_UART_CLOCK=24000000
+ CONFIG_DEBUG_UART=y
+ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3528-radxa-e20c.dtb"
+ # CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_BOARD_RNG_SEED=y
+ CONFIG_SPL_MAX_SIZE=0x40000
+ # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+ CONFIG_CMD_MEMINFO=y
+@@ -26,6 +28,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
+ CONFIG_CMD_RNG=y
+ CONFIG_CMD_REGULATOR=y
+ # CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_OF_LIST="rockchip/rk3528-radxa-e20c rockchip/rk3528-rock-2a rockchip/rk3528-rock-2f"
+ CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+ CONFIG_BUTTON=y
+ CONFIG_BUTTON_ADC=y
+--- /dev/null
++++ b/configs/rock-2-rk3528_defconfig
+@@ -0,0 +1,68 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT=y
++CONFIG_COUNTER_FREQUENCY=24000000
++CONFIG_ARCH_ROCKCHIP=y
++CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3528-rock-2a"
++CONFIG_ROCKCHIP_RK3528=y
++CONFIG_TARGET_RADXA_ROCK_2_RK3528=y
++CONFIG_SYS_LOAD_ADDR=0xc00800
++CONFIG_DEBUG_UART_BASE=0xFF9F0000
++CONFIG_DEBUG_UART_CLOCK=24000000
++CONFIG_DEBUG_UART=y
++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3528-rock-2a.dtb"
++# CONFIG_DISPLAY_CPUINFO is not set
++CONFIG_BOARD_RNG_SEED=y
++CONFIG_SPL_MAX_SIZE=0x40000
++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
++CONFIG_CMD_MEMINFO=y
++CONFIG_CMD_MEMINFO_MAP=y
++CONFIG_CMD_ADC=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MISC=y
++CONFIG_CMD_MMC=y
++CONFIG_CMD_USB=y
++CONFIG_CMD_ROCKUSB=y
++CONFIG_CMD_USB_MASS_STORAGE=y
++# CONFIG_CMD_SETEXPR is not set
++CONFIG_CMD_RNG=y
++CONFIG_CMD_REGULATOR=y
++# CONFIG_SPL_DOS_PARTITION is not set
++CONFIG_OF_LIST="rockchip/rk3528-rock-2a rockchip/rk3528-rock-2f rockchip/rk3528-radxa-e20c"
++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
++CONFIG_BUTTON=y
++CONFIG_BUTTON_ADC=y
++CONFIG_BUTTON_GPIO=y
++# CONFIG_USB_FUNCTION_FASTBOOT is not set
++CONFIG_ROCKCHIP_GPIO=y
++CONFIG_LED=y
++CONFIG_LED_GPIO=y
++CONFIG_SUPPORT_EMMC_RPMB=y
++CONFIG_MMC_DW=y
++CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_SDMA=y
++CONFIG_MMC_SDHCI_ROCKCHIP=y
++CONFIG_PHY_MOTORCOMM=y
++CONFIG_PHY_REALTEK=y
++CONFIG_DM_MDIO=y
++CONFIG_DWC_ETH_QOS=y
++CONFIG_DWC_ETH_QOS_ROCKCHIP=y
++CONFIG_PHY_ROCKCHIP_INNO_USB2=y
++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
++CONFIG_REGULATOR_PWM=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_PWM_ROCKCHIP=y
++CONFIG_BAUDRATE=1500000
++CONFIG_DEBUG_UART_SHIFT=2
++CONFIG_SYS_NS16550_MEM32=y
++CONFIG_USB=y
++CONFIG_USB_XHCI_HCD=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_GENERIC=y
++CONFIG_USB_DWC3=y
++CONFIG_USB_DWC3_GENERIC=y
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_DOWNLOAD=y
++CONFIG_USB_FUNCTION_ROCKUSB=y
++CONFIG_ERRNO_STR=y
+--- a/doc/board/rockchip/rockchip.rst
++++ b/doc/board/rockchip/rockchip.rst
+@@ -102,6 +102,7 @@ List of mainline supported Rockchip boar
+ * rk3528
+ - Generic RK3528 (generic-rk3528)
+ - Radxa E20C (radxa-e20c-rk3528)
++ - Radxa ROCK 2A/2F (rock-2-rk3528)
+
+ * rk3566
+ - Anbernic RGxx3 (anbernic-rgxx3-rk3566)