drm/amd/powerplay: add pp_table_version in hwmgr.
authorRex Zhu <[email protected]>
Wed, 24 Aug 2016 03:28:41 +0000 (11:28 +0800)
committerAlex Deucher <[email protected]>
Fri, 16 Sep 2016 19:52:49 +0000 (15:52 -0400)
Signed-off-by: Rex Zhu <[email protected]>
Acked-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Edward O'Callaghan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h

index 2d72e06845b7651b64f53d97f0b76dec43177840..82427fb454d2793a2febd326861fbee37730f33d 100644 (file)
@@ -67,6 +67,7 @@ int hwmgr_init(struct amd_pp_init *pp_init, struct pp_instance *handle)
        hwmgr->chip_id = pp_init->chip_id;
        hwmgr->usec_timeout = AMD_MAX_USEC_TIMEOUT;
        hwmgr->power_source = PP_PowerSource_AC;
+       hwmgr->pp_table_version = PP_TABLE_V1;
 
        hwmgr_init_default_caps(hwmgr);
        hwmgr_set_user_specify_caps(hwmgr);
index 7caf8d071ce73425d959ae9a166ba9f3e23a7a4a..e9874834480112d854a3a54821f8a053bd50b1dd 100644 (file)
@@ -599,6 +599,13 @@ enum PP_VCE_LEVEL {
 };
 
 
+enum PP_TABLE_VERSION {
+       PP_TABLE_V0 = 0,
+       PP_TABLE_V1,
+       PP_TABLE_V2,
+       PP_TABLE_MAX
+};
+
 /**
  * The main hardware manager structure.
  */
@@ -606,6 +613,7 @@ struct pp_hwmgr {
        uint32_t chip_family;
        uint32_t chip_id;
 
+       uint32_t pp_table_version;
        void *device;
        struct pp_smumgr *smumgr;
        const void *soft_pp_table;