x86/cpufeature: Add feature bit for Intel's Silicon Debug CPUID bit

Add a CPUID feature bit for the SDBG (Silicon Debug) CPU feature
found on recent Intel systems starting with Haswell.

Using the IA32_DEBUG_INTERFACE MSR (index C80H) one can at least
detect if SDBG has been enabled by the firmware and if it has
been used or not.

Signed-off-by: Mathias Krause <[email protected]>
Signed-off-by: Borislav Petkov <[email protected]>
Cc: Aaron Lu <[email protected]>
Cc: Dave Hansen <[email protected]>
Cc: Dirk Brandewie <[email protected]>
Cc: H. Peter Anvin <[email protected]>
Cc: Josh Triplett <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Ross Zwisler <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Ingo Molnar <[email protected]>

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 3d6606fb97d05496d21ea93c0030a5f7aa109516..4b11974b4ea78924e49edbe43f938d7162ab3f9d 100644 (file)
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -119,6 +119,7 @@
 #define X86_FEATURE_TM2                ( 4*32+ 8) /* Thermal Monitor 2 */
 #define X86_FEATURE_SSSE3      ( 4*32+ 9) /* Supplemental SSE-3 */
 #define X86_FEATURE_CID                ( 4*32+10) /* Context ID */
+#define X86_FEATURE_SDBG       ( 4*32+11) /* Silicon Debug */
 #define X86_FEATURE_FMA                ( 4*32+12) /* Fused multiply-add */
 #define X86_FEATURE_CX16       ( 4*32+13) /* CMPXCHG16B */
 #define X86_FEATURE_XTPR       ( 4*32+14) /* Send Task Priority Messages */