arm64: mvebu: Armada 7k/8k: Add SDHCI device tree nodes
authorStefan Roese <[email protected]>
Fri, 9 Dec 2016 14:40:05 +0000 (15:40 +0100)
committerStefan Roese <[email protected]>
Wed, 25 Jan 2017 06:04:08 +0000 (07:04 +0100)
This patch adds the SDHCI device tree nodes to the Armada AP806 dtsi
file which is used by the Armada 7k/8K SoCs.

Signed-off-by: Stefan Roese <[email protected]>
Cc: Nadav Haklai <[email protected]>
Cc: Kostya Porotchkin <[email protected]>
Cc: Wilson Ding <[email protected]>
Cc: Victor Gu <[email protected]>
Cc: Hua Jing <[email protected]>
Cc: Terry Zhou <[email protected]>
Cc: Hanna Hawa <[email protected]>
Cc: Haim Boot <[email protected]>
arch/arm/dts/armada-ap806.dtsi
arch/arm/dts/armada-cp110-master.dtsi

index efb383b9f394cd29bdc3e5e67bff778bd3e14852..3042cb154b70a566790d398e2875e6eb092ac494 100644 (file)
 
                        };
 
+                       ap_sdhci0: sdhci@6e0000 {
+                               compatible = "marvell,armada-8k-sdhci";
+                               reg = <0x6e0000 0x300>;
+                               interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+                               dma-coherent;
+                               status = "disabled";
+                       };
+
                        ap_syscon: system-controller@6f4000 {
                                compatible = "marvell,ap806-system-controller",
                                             "syscon";
index d637867615fd190b44a55efcfbea8efaf9451b4a..661a69679edc47f24897124edb28925fc4a84a2d 100644 (file)
                                utmi-port = <UTMI_PHY_TO_USB_HOST1>;
                                status = "disabled";
                        };
+
+                       cpm_sdhci0: sdhci@780000 {
+                               compatible = "marvell,armada-8k-sdhci";
+                               reg = <0x780000 0x300>;
+                               interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+                               dma-coherent;
+                               status = "disabled";
+                       };
                };
 
                cpm_pcie0: pcie@f2600000 {