The early serial should not be configured again in initcode() for BYPASS
boot mode and in start() for the other LDR boot modes.
In BYPASS boot mode, the start up code is located in Nor flash address other
than the DRAM address defined in link script. The code embedded string can't
be addressed by its compile time symbol. Calculate it according to the flash
offset.
Signed-off-by: Sonic Zhang <[email protected]>
}
#endif
+#if CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS
if (BFIN_DEBUG_EARLY_SERIAL) {
serial_early_init(uart_base);
serial_early_set_baud(uart_base, CONFIG_BAUDRATE);
}
+#endif
}
__attribute__((always_inline))
#else
.macro serial_early_init
-#ifdef CONFIG_DEBUG_EARLY_SERIAL
+#if defined(CONFIG_DEBUG_EARLY_SERIAL) && defined(BFIN_BOOT_BYPASS)
call _serial_initialize;
#endif
.endm
.macro serial_early_set_baud
-#ifdef CONFIG_DEBUG_EARLY_SERIAL
+#if defined(CONFIG_DEBUG_EARLY_SERIAL) && defined(BFIN_BOOT_BYPASS)
R0.L = LO(CONFIG_BAUDRATE);
R0.H = HI(CONFIG_BAUDRATE);
call _serial_set_baud;
#endif
.endm
+#if CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS
+#define update_serial_early_string_addr \
+ R1.L = _start; \
+ R1.H = _start; \
+ R0 = R0 - R1; \
+ R1.L = 0; \
+ R1.H = 0x2000; \
+ R0 = R0 + R1;
+#else
+#define update_serial_early_string_addr
+#endif
+
/* Since we embed the string right into our .text section, we need
* to find its address. We do this by getting our PC and adding 2
* bytes (which is the length of the jump instruction). Then we
.previous; \
R0.L = 7b; \
R0.H = 7b; \
+ update_serial_early_string_addr \
call _serial_puts;
#else
# define serial_early_puts(str)
* weird multiplication is to make sure we over sample just
* a little rather than under sample the incoming signals.
*/
+#if CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS
+ uint16_t divisor = (early_get_uart_clk() + baud * 8) / (baud * 16)
+ - ANOMALY_05000230;
+#else
uint16_t divisor = early_division(early_get_uart_clk() + (baud * 8),
baud * 16) - ANOMALY_05000230;
+#endif
serial_set_divisor(uart_base, divisor);
}
#include <asm/blackfin.h>
#ifdef PLL_CTL
#include <asm/mach-common/bits/pll.h>
-# define pll_is_bypassed() (bfin_read_PLL_STAT() & DF)
+# define pll_is_bypassed() (bfin_read_PLL_CTL() & BYPASS)
#else
#include <asm/mach-common/bits/cgu.h>
# define pll_is_bypassed() (bfin_read_CGU_STAT() & PLLBP)
if (!pll_is_bypassed()) {
div = bfin_read_PLL_DIV();
ssel = (div & SSEL) >> SSEL_P;
+#if CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS
+ sclk = vco/ssel;
+#else
sclk = early_division(vco, ssel);
+#endif
}
uclk = sclk;
#ifdef CGU_DIV