arm64: dts: renesas: condor: add SCIF0 pins

Add the (previously omitted) SCIF0 pin data to the Condor board's
device tree.

Signed-off-by: Sergei Shtylyov <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Simon Horman <[email protected]>

diff --git a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
index 06cf6845765ad75590e6e85a8eeb360bb631cbb2..38f11cee42dc5331ab1696bd116da79ec736e705 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -49,7 +49,22 @@
        clock-frequency = <32768>;
 };
 
+&pfc {
+       scif0_pins: scif0 {
+               groups = "scif0_data";
+               function = "scif0";
+       };
+
+       scif_clk_pins: scif_clk {
+               groups = "scif_clk_b";
+               function = "scif_clk";
+       };
+};
+
 &scif0 {
+       pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
+       pinctrl-names = "default";
+
        status = "okay";
 };