s3c-fb: correct FRAMESEL1 bitfield defines for VIDINTCON0 register

FRAMESEL1 bitfield starts on 13th bit, not on 14th.

Signed-off-by: Pawel Osciak <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Acked-by: Ben Dooks <[email protected]>
Cc: InKi Dae <[email protected]>
Cc: Marek Szyprowski <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>

diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h
index f4259e523366290f5f25c02bd1d0e559b0e2bfa9..ac10013959bd120d29881b07266dc8661490c643 100644 (file)
--- a/arch/arm/plat-samsung/include/plat/regs-fb.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb.h
@@ -292,11 +292,11 @@
 #define VIDINTCON0_FRAMESEL0_ACTIVE            (0x2 << 15)
 #define VIDINTCON0_FRAMESEL0_FRONTPORCH                (0x3 << 15)
 
-#define VIDINTCON0_FRAMESEL1                   (1 << 14)
-#define VIDINTCON0_FRAMESEL1_NONE              (0x0 << 14)
-#define VIDINTCON0_FRAMESEL1_BACKPORCH         (0x1 << 14)
-#define VIDINTCON0_FRAMESEL1_VSYNC             (0x2 << 14)
-#define VIDINTCON0_FRAMESEL1_FRONTPORCH                (0x3 << 14)
+#define VIDINTCON0_FRAMESEL1                   (1 << 13)
+#define VIDINTCON0_FRAMESEL1_NONE              (0x0 << 13)
+#define VIDINTCON0_FRAMESEL1_BACKPORCH         (0x1 << 13)
+#define VIDINTCON0_FRAMESEL1_VSYNC             (0x2 << 13)
+#define VIDINTCON0_FRAMESEL1_FRONTPORCH                (0x3 << 13)
 
 #define VIDINTCON0_INT_FRAME                   (1 << 12)
 #define VIDINTCON0_FIFIOSEL_MASK               (0x7f << 5)