realtek: rtl930x: Define GPIO_SEL_CTRL pinmux node

The pinmux-related registers on the RTL930X SoC family are spread across
various non-consecutive registers. It might be tempting to modify them
directly in a specific driver (SPI, LED, etc.), but this would cause issues
with parallel, non-locked read-modify-write operations, which are required
to update individual portions of these registers.

Instead, it is better to use the devicetree pinctrl properties to define
the correct configurations for the various operation modes.

One important setting here is the LED Sync bit. This allows the LED
controller to generate an additional positive edge on the `STCP`
("STore Clock Pin", also known as `RCLK`) of the LED shift register after
the actual content has already been shifted in using the normal shift
clock. The LED shift register is then expected to copy the content from the
shift register section into the storage registers, which act as the actual
LED output control. This functionality is available in, and commonly used
with, the SNx4HC595 family of shift registers.

To activate it, simply register it in the default state of the
"realtek,rtl83xx-switch" node:

    &switch0 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinmux_enable_led_sync>;
    	....
    };

It would be nicer when this can be directly added to the led subnode. But
for this to work, `realtek,rtl9300-leds` must first be an actual driver
(known to the driver core).

[1] https://www.ti.com/lit/ds/symlink/sn74hc595.pdf

Suggested-by: Bevan Weiss <[email protected]>
Signed-off-by: Sven Eckelmann <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/19815
Signed-off-by: Robert Marko <[email protected]>

diff --git a/target/linux/realtek/dts/rtl930x.dtsi b/target/linux/realtek/dts/rtl930x.dtsi
index 02d8c47e7c4ec5d14781723e525a33e6c37ecea8..312cc77956d711af3ed70659cecb2b8259c522f9 100644 (file)
--- a/target/linux/realtek/dts/rtl930x.dtsi
+++ b/target/linux/realtek/dts/rtl930x.dtsi
@@ -195,6 +195,44 @@
                };
        };
 
+       pinmux@1b000200 {
+               compatible = "pinctrl-single";
+               reg = <0x1b000200 0x4>;
+
+               pinctrl-single,bit-per-mux;
+               pinctrl-single,register-width = <32>;
+               pinctrl-single,function-mask = <0x1>;
+               #pinctrl-cells = <2>;
+
+               /* Enable GPIO 19 */
+               pinmux_disable_led_sync: disable-led-sync {
+                       pinctrl-single,bits = <0x0 0x0 0x800>;
+               };
+
+               pinmux_enable_led_sync: enable-led-sync {
+                       pinctrl-single,bits = <0x0 0x800 0x800>;
+               };
+
+               /* Enable GPIO 18 */
+               pinmux_disable_usb_led: disable-usb-led {
+                       pinctrl-single,bits = <0x0 0x0 0x400>;
+               };
+
+               pinmux_enable_usb_led: enable-usb-led {
+                       pinctrl-single,bits = <0x0 0x400 0x400>;
+               };
+
+               /* Disable SLV SPI CS - freeing any associated GPIOs */
+               pinmux_disable_slv_spi_cs: disable-slv-spi-cs {
+                       pinctrl-single,bits = <0x0 0x0 0x3E0>;
+               };
+
+               /* Disable SLV SPI SDO - freeing any associated GPIOs */
+               pinmux_disable_slv_spi_sdo: disable-slv-spi-sdo {
+                       pinctrl-single,bits = <0x0 0x0 0x1F>;
+               };
+       };
+
        pinmux@1b00c600 {
                compatible = "pinctrl-single";
                reg = <0x1b00c600 0x4>;