drm/i915: Move Haswell registers to separate whitelist table

Now that we can whitelist registers only on Haswell, move HSW_SCRATCH1
and HSW_ROW_CHICKEN3 into a separate Haswell only table.

Signed-off-by: Jordan Justen <[email protected]>
Cc: Francisco Jerez <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index ce753d3a817f749f0d1dd8c925e6d38ce3fd339a..6c81c700d746fef91286a16444deaa5fa09f03f0 100644 (file)
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -472,6 +472,9 @@ static const struct drm_i915_reg_descriptor gen7_render_regs[] = {
        REG32(GEN7_L3SQCREG1),
        REG32(GEN7_L3CNTLREG2),
        REG32(GEN7_L3CNTLREG3),
+};
+
+static const struct drm_i915_reg_descriptor hsw_render_regs[] = {
        REG32(HSW_SCRATCH1,
              .mask = ~HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE,
              .value = 0),
@@ -519,6 +522,7 @@ static const struct drm_i915_reg_table ivb_blt_reg_tables[] = {
 
 static const struct drm_i915_reg_table hsw_render_reg_tables[] = {
        { gen7_render_regs, ARRAY_SIZE(gen7_render_regs), false },
+       { hsw_render_regs, ARRAY_SIZE(hsw_render_regs), false },
        { hsw_master_regs, ARRAY_SIZE(hsw_master_regs), true },
 };