ti: k3: common: Only enable caches early

We can enter and exit coherency without any software operations,
but HW_ASSISTED_COHERENCY has stronger implications that are
causing issues. Until these can be resolved, only use the weaker
WARMBOOT_ENABLE_DCACHE_EARLY flag.

Signed-off-by: Andrew F. Davis <[email protected]>

diff --git a/plat/ti/k3/common/plat_common.mk b/plat/ti/k3/common/plat_common.mk
index bf2a73fbb19bbd9b9d305ebbf35c6ae979cbbddb..7cb6eb78ef982dd97311486752309576c6c8cfbf 100644 (file)
--- a/plat/ti/k3/common/plat_common.mk
+++ b/plat/ti/k3/common/plat_common.mk
@@ -12,7 +12,7 @@ COLD_BOOT_SINGLE_CPU  :=      1
 PROGRAMMABLE_RESET_ADDRESS:=   1
 
 # System coherency is managed in hardware
-HW_ASSISTED_COHERENCY  :=      1
+WARMBOOT_ENABLE_DCACHE_EARLY:= 1
 USE_COHERENT_MEM       :=      0
 
 ERROR_DEPRECATED       :=      1