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drm/amd/powerplay: select samu dpm 0 as boot level on polaris.
author
Rex Zhu
<
[email protected]
>
Sun, 12 Jun 2016 03:18:01 +0000
(11:18 +0800)
committer
Alex Deucher
<
[email protected]
>
Wed, 15 Jun 2016 06:00:54 +0000
(
02:00
-0400)
Signed-off-by: Rex Zhu <
[email protected]
>
Reviewed-by: Alex Deucher <
[email protected]
>
Signed-off-by: Alex Deucher <
[email protected]
>
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
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diff --git
a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
index ad0995c5c56337a945d8831f1de4d7546f3506c7..1400bc420881d58ef7171a1e2309677a7de20a9a 100644
(file)
--- a/
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
+++ b/
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
@@
-4196,12
+4196,9
@@
int polaris10_update_samu_dpm(struct pp_hwmgr *hwmgr, bool bgate)
{
struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
uint32_t mm_boot_level_offset, mm_boot_level_value;
- struct phm_ppt_v1_information *table_info =
- (struct phm_ppt_v1_information *)(hwmgr->pptable);
if (!bgate) {
- data->smc_state_table.SamuBootLevel =
- (uint8_t) (table_info->mm_dep_table->count - 1);
+ data->smc_state_table.SamuBootLevel = 0;
mm_boot_level_offset = data->dpm_table_start +
offsetof(SMU74_Discrete_DpmTable, SamuBootLevel);
mm_boot_level_offset /= 4;