cxl: Set the valid bit in PE for dedicated mode

Make sure to set the valid-bit in software-state field of the
populated PE. This was earlier missing for dedicated mode AFUs, hence
was causing a PSL freeze when the AFU was activated.

Signed-off-by: Vaibhav Jain <[email protected]>
Acked-by: Frederic Barrat <[email protected]>
Acked-by: Andrew Donnellan <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>

diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 4a82c313cf71b4235413f2f041f4256d5bf12acb..75df74d59527d2ee264f384a8f3ee40c8ced259e 100644 (file)
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -897,6 +897,14 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context *ctx, u64 wed, u64 amr)
        if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)
                afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);
 
+       ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V);
+       /*
+        * Ideally we should do a wmb() here to make sure the changes to the
+        * PE are visible to the card before we call afu_enable.
+        * On ppc64 though all mmios are preceded by a 'sync' instruction hence
+        * we dont dont need one here.
+        */
+
        result = cxl_ops->afu_reset(afu);
        if (result)
                return result;