ath79: fix 10 Mbit PLL data for TP-Link EAP2xx

Fix the PLL register value for 10 Mbit/s link modes on TP-Link EAP
boards using a AR8033 SGMII PHY.

Otherwise, 10 Mbit/s links do not transfer data.

Reported-by: Tom Herbers <[email protected]>
Tested-by: Tom Herbers <[email protected]>
Signed-off-by: David Bauer <[email protected]>
(cherry picked from commit bbff6239e2ea273388f4ca0f8586945ff5f36271)

diff --git a/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi b/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi
index cc9e0b7ff6c4e8047f92b61d9a800856c8e95fcc..a6aefc7b55a8e8705f833d06290d78a3f1937516 100644 (file)
--- a/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi
+++ b/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi
@@ -112,6 +112,7 @@
 
        phy-handle = <&phy4>;
        phy-mode = "sgmii";
+       pll-data = <0x03000000 0x00000101 0x00001313>;
 
        mtd-mac-address = <&info 0x8>;